无线传感器网络节点芯片安全增强策略研究
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摘要
无线传感器网络(Wireless Sensor Network,WSN)是一类由大量节点组成的Ad Hoc网络,广泛应用于国防军事、医疗、环境监测和预报、交通管理、高效农业等许多领域。无线传感器网络带来了一系列挑战,WSN系统的成本和供电都受到极大限制,从而导致网络的计算和通信能力有限。另一方面,许多应用对于无线传感器网络的安全性提出了要求,安全问题又受限于成本和计算能力,已成为阻碍无线传感器网络实际应用的主要障碍之一。节点芯片是无线传感器网络的核心部件,其性能、安全性和能耗直接影响整个WSN节点和网络的应用范围、安全性、生命周期。本文针对低代价、高安全性的WSN节点SoC(System-on-Chip)设计实现中若干关键问题开展的如下研究:
首先,讨论无线传感器网络中常用的IEEE802.15.4协议,在此基础上提出基于单周期8051的WSN节点芯片架构,着重讨论存储结构、直接存储访问控制器、中断仲裁器、媒体访问控制协处理器的设计实现;分析这种通用结构的WSN节点芯片的潜在的安全隐患和在安全上有利的条件。
其次,针对应用于无线传感器网络的加密和认证电路进行研究。考虑吞吐率条件下,定义能耗变量来衡量不同的电路实现对功耗的优化效果;在此基础上,对AES和SHA-1电路的设计实现和能耗和面积的优化进行讨论,并比较不同认证电路的在不同负载下的能耗。分析针对加密电路的旁路分析攻击原理、方法和防护策略;提出在AES加密电路中,采用低代价的异构S盒随机置换的策略来优化旁路安全性的措施,并进行仿真实验;基于上述研究结果,设计实现符合IEEE802.15.4的MAC加密协处理器。上述研究可应用于WSN安全机制,而且对泛在计算中通信数据的加密和认证实现及优化具有指导意义。
针对密钥保护、更新和管理和机密信息保护进行研究,提出采用机密信息保护协处理器(Secure Information Protect Co-processor,SIPC)的策略对WSN节点芯片的机密信息进行管理和保护。SIPC采用优化的SHA-1引擎,并设计合适的指令集。由于代码的篡改较为容易,而修改硬件的成本很高,因此,利用硬件进行安全启动和节点系统恢复。上述机制采用哈希树的代码认证方法来进行WSN节点芯片的安全启动,在认证失败条件下由SIPC接管节点,利用SIPC、DMA和MAC协处理器,进行节点的功能恢复。
基于接收信号强度指示技术,设计应用于无线传感器网络的定位引擎;研究利用定位引擎,将位置信息引入密钥分配机制中的方法,这种策略可以防护多种攻击,有效提高了网络安全性。
最后,详细讨论WSN节点芯片的低功耗策略,分析了两种低功耗的措施:关断时钟和关断电源。推导休眠能耗模型,研究芯片架构和基本器件对休眠唤醒机制的支持;分析供电单元、定时器、功耗管理单元的低功耗设计;讨论功可配置的协处理器自主完成唤醒信号检测功能的方法。
Wireless sensor networks(WSNs) are a kind of wireless Ad Hoc network composed of a large number of Sensor nodes.They attract much attention due to its wide range of potential applications,such as logistics,military surveillance,medical treatment,traffic management,efficient agriculture,environmental monitoring,and so on.Wireless sensor networks pose a number of challenging problems.For instance,WSN systems have very limited cost and power supply by its nature,which lead to limited ability of computing and communication.On the other hand,one of the most critical issues WSNs is security issue, which is becoming the key barrier for practical applications.Sensor nodes chips are core devices of WSN,and have direct impact on the performance,security and lifetime of of WSNs.In this dissertation,the focus is mainly on several problems for design and optimization of the low-cost high-security WSNs node SoC(System-on-Chip) as follows:
Firstly,IEEE 802.15.4 potocol is discussed which is utilized widely in wireless sensor networks as the standard in low-rate wireless personal area network(LR-WPAN). The implementation of WSN node chips are proposed based on sigle-cycle 8051 microprocessor tructure.Focuses are put on the storage strategy,direct memory access (DMA) controllers design,and medium access control(MAC) coprocessor implementation.Then,the potential security problems and improved chances are analysised.
Secondly,hardware implementations of the authentication and encryption circuits are presented.An energy consumption variable is derived for battery-powered sensor nodes to evaluate the low-power design strategy,when considering the thoughput of the system. Optimization of area and power consumption of advanced encryption standard(AES) and secure hash algorithms(SHA) are discussed in detail.These circuits were implemented with 0.25μm 1.8V CMOS(complementary metal-oxide-semiconductor) standard cell library,and comparisons were performed in area,throughput and energy for different authentication implementations.Based on the discussion of AES hardware implementation and power analysis theory,a novel power analysis immune scheme is proposed.This method divides the data-path of AES into two parts:inhomogeneous S-Boxes instead of fixed S-Boxes are selected randomly to disturb power and logic delay in the non-linear module;at the same time,the general masking strategy is applied in the linear part.Following that,a MAC encryption coprocessor suitable for IEEE802.15.4 standard is implemented.The above researches can be used in WSN,and contributes to ubiquitous computing security issue.
A new secure information protect coprocessor(SIPC) is proposed to deal with secret key protection,updating,and management.The SIPC utilizes the SHA-1 engine,and optimized instruction set is proposed based on the security model.It is easy to tamper soft code in WSN nodes,whereas modifying the hardware are expensive in time and cost.So it is possible to perform secure bootload and recovery.The WSNs nodes chip can boot with authentication using hash trees.When authentication failing,SIPC takes over the whole node instead of microprocessor.Then,SIPC,DMA and MAC cooperate to recover the chip fuction.
A location engine for WSN is implemented based on received signal strength indicator(RSSI) technology with a maximum likelihood estimation algorithm.Then,this dissertation studies the key distribution scheme using location information.This stragety can resist many kind attacks and enhance the WSN security.
Finally,power optimization schemes are discussed.Two different sleep modes are proposed for sensor node chips:shutting down clock and power supply.State transition between different power modes are described by linear model;and two types of oscillators are used to reduce wakeup time.The key issues including power supply module design, data retention and MAC timer synchronization strategy are detailed.The chip utilize a coprocessor and wireless receiver to detect wakeup preamble instead of using embedded microprocessor control unit,which lead to high efficiency and low energy consumption.
首先,讨论无线传感器网络中常用的IEEE802.15.4协议,在此基础上提出基于单周期8051的WSN节点芯片架构,着重讨论存储结构、直接存储访问控制器、中断仲裁器、媒体访问控制协处理器的设计实现;分析这种通用结构的WSN节点芯片的潜在的安全隐患和在安全上有利的条件。
其次,针对应用于无线传感器网络的加密和认证电路进行研究。考虑吞吐率条件下,定义能耗变量来衡量不同的电路实现对功耗的优化效果;在此基础上,对AES和SHA-1电路的设计实现和能耗和面积的优化进行讨论,并比较不同认证电路的在不同负载下的能耗。分析针对加密电路的旁路分析攻击原理、方法和防护策略;提出在AES加密电路中,采用低代价的异构S盒随机置换的策略来优化旁路安全性的措施,并进行仿真实验;基于上述研究结果,设计实现符合IEEE802.15.4的MAC加密协处理器。上述研究可应用于WSN安全机制,而且对泛在计算中通信数据的加密和认证实现及优化具有指导意义。
针对密钥保护、更新和管理和机密信息保护进行研究,提出采用机密信息保护协处理器(Secure Information Protect Co-processor,SIPC)的策略对WSN节点芯片的机密信息进行管理和保护。SIPC采用优化的SHA-1引擎,并设计合适的指令集。由于代码的篡改较为容易,而修改硬件的成本很高,因此,利用硬件进行安全启动和节点系统恢复。上述机制采用哈希树的代码认证方法来进行WSN节点芯片的安全启动,在认证失败条件下由SIPC接管节点,利用SIPC、DMA和MAC协处理器,进行节点的功能恢复。
基于接收信号强度指示技术,设计应用于无线传感器网络的定位引擎;研究利用定位引擎,将位置信息引入密钥分配机制中的方法,这种策略可以防护多种攻击,有效提高了网络安全性。
最后,详细讨论WSN节点芯片的低功耗策略,分析了两种低功耗的措施:关断时钟和关断电源。推导休眠能耗模型,研究芯片架构和基本器件对休眠唤醒机制的支持;分析供电单元、定时器、功耗管理单元的低功耗设计;讨论功可配置的协处理器自主完成唤醒信号检测功能的方法。
Wireless sensor networks(WSNs) are a kind of wireless Ad Hoc network composed of a large number of Sensor nodes.They attract much attention due to its wide range of potential applications,such as logistics,military surveillance,medical treatment,traffic management,efficient agriculture,environmental monitoring,and so on.Wireless sensor networks pose a number of challenging problems.For instance,WSN systems have very limited cost and power supply by its nature,which lead to limited ability of computing and communication.On the other hand,one of the most critical issues WSNs is security issue, which is becoming the key barrier for practical applications.Sensor nodes chips are core devices of WSN,and have direct impact on the performance,security and lifetime of of WSNs.In this dissertation,the focus is mainly on several problems for design and optimization of the low-cost high-security WSNs node SoC(System-on-Chip) as follows:
Firstly,IEEE 802.15.4 potocol is discussed which is utilized widely in wireless sensor networks as the standard in low-rate wireless personal area network(LR-WPAN). The implementation of WSN node chips are proposed based on sigle-cycle 8051 microprocessor tructure.Focuses are put on the storage strategy,direct memory access (DMA) controllers design,and medium access control(MAC) coprocessor implementation.Then,the potential security problems and improved chances are analysised.
Secondly,hardware implementations of the authentication and encryption circuits are presented.An energy consumption variable is derived for battery-powered sensor nodes to evaluate the low-power design strategy,when considering the thoughput of the system. Optimization of area and power consumption of advanced encryption standard(AES) and secure hash algorithms(SHA) are discussed in detail.These circuits were implemented with 0.25μm 1.8V CMOS(complementary metal-oxide-semiconductor) standard cell library,and comparisons were performed in area,throughput and energy for different authentication implementations.Based on the discussion of AES hardware implementation and power analysis theory,a novel power analysis immune scheme is proposed.This method divides the data-path of AES into two parts:inhomogeneous S-Boxes instead of fixed S-Boxes are selected randomly to disturb power and logic delay in the non-linear module;at the same time,the general masking strategy is applied in the linear part.Following that,a MAC encryption coprocessor suitable for IEEE802.15.4 standard is implemented.The above researches can be used in WSN,and contributes to ubiquitous computing security issue.
A new secure information protect coprocessor(SIPC) is proposed to deal with secret key protection,updating,and management.The SIPC utilizes the SHA-1 engine,and optimized instruction set is proposed based on the security model.It is easy to tamper soft code in WSN nodes,whereas modifying the hardware are expensive in time and cost.So it is possible to perform secure bootload and recovery.The WSNs nodes chip can boot with authentication using hash trees.When authentication failing,SIPC takes over the whole node instead of microprocessor.Then,SIPC,DMA and MAC cooperate to recover the chip fuction.
A location engine for WSN is implemented based on received signal strength indicator(RSSI) technology with a maximum likelihood estimation algorithm.Then,this dissertation studies the key distribution scheme using location information.This stragety can resist many kind attacks and enhance the WSN security.
Finally,power optimization schemes are discussed.Two different sleep modes are proposed for sensor node chips:shutting down clock and power supply.State transition between different power modes are described by linear model;and two types of oscillators are used to reduce wakeup time.The key issues including power supply module design, data retention and MAC timer synchronization strategy are detailed.The chip utilize a coprocessor and wireless receiver to detect wakeup preamble instead of using embedded microprocessor control unit,which lead to high efficiency and low energy consumption.
引文
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