快速模型预测控制的FPGA实现及其应用研究
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摘要
由于模型预测控制具有前馈-反馈结构，可以处理多变量、多输入、多输出的高维系统，能在优化的意义上显式和主动处理时域硬约束等特点，因此得到了众多领域的广泛关注和讨论，其应用也逐渐跨越工业过程控制领域延伸到快速动态系统和嵌入式系统等新应用领域。模型预测控制的求解过程不是一次离线计算完成的，而是在有限的采样时间间隔内反复在线计算求解，在线计算负担制约了模型预测控制在快速系统中的应用，同时，新应用领域也对模型预测控制器提出了高实时性、微型化和高集成度等新的需求，因此，如何在有限的采样间隔内快速找到最优解和寻求新的高效的控制器硬件实现方案是拓展模型预测控制应用领域亟需解决的两大难题。本论文的主要研究内容是快速模型预测控制的FPGA（Field Programmable Gate Array）实现及其应用研究，旨在减轻模型预测控制的在线计算负担，提高在线计算性能，拓展模型预测控制在实际快速系统中的成功应用。
为了快速求解模型预测控制的约束优化问题，提出了约束粒子群优化方法。首先给出了基本粒子群方法的计算公式和算法步骤，然后采用惩罚函数法处理约束，结合基本粒子群方法的迭代逻辑简单、可并行计算等特性，使得约束粒子群方法具有快速求解优化问题的能力。最后，通过模型预测控制的线性和非线性两个实例仿真实验，验证了约束粒子群优化方法的有效性。同时将约束粒子群法与常用的优化算法进行了对比分析，为控制器的硬件实现提供了算法基础。
为满足新应用领域对控制器提出的高实时性、微型化、高集成度等新需求，提出了模型预测控制器的FPGA硬件加速实现方法，利用FPGA的灵活性和硬件并行计算特性，实现了控制器的可配置化和快速计算。首先提出了基于FPGA的SoPC（Systemon Programmable Chip）嵌入式系统实现方法，该方法在FPGA中嵌入Nios II软核处理器，并进行SoPC系统的硬件和软件设计，通过浮点自定义指令和矩阵运算自定制组件的设计提高控制算法的在线计算性能，该实现方案具有较强的灵活性，占用的硬件资源较少。然后，提出了FPGA全硬件实现方案，采用半自动模块化的FPGA方法进行控制器的设计。根据算法的优化分析，对控制算法的耗时计算步骤进行流水线和循环展开处理，充分利用FPGA并行计算结构提升模型预测控制器的在线求解速度，该实现方法占用的硬件资源较多，但是具有更好的实时性。最后，通过数值实例的FPGA实现，分析比较了两种FPGA实现方案的计算性能。
从实际应用的角度，研究了线性模型预测控制在电子节气门控制中的应用。首先根据节气门的组成结构建立了电子节气门数学模型，并给出了节气门的控制要求。然后，基于该模型设计了电子节气门位置跟踪模型预测控制器，分别采用积极集法、内点法和约束粒子群法求解二次规划问题，通过离线仿真实验对比分析了三种优化算法的控制效果和计算性能。离线实验结果表明三种优化算法都具有很好的控制效果，但是均不能在节气门要求的1ms采样时间内求出解。为了进一步提高算法的实时性，采用FPGA硬件加速方法，分别设计实现了基于积极集法的FPGA嵌入式模型预测控制器和基于粒子群法的FPGA全硬件模型预测控制器，并在搭建的实验平台上分别进行了两种控制器的实时实验测试，实验结果验证了两种基于FPGA实现的线性模型预测控制器的实时性和有效性，很好地满足了节气门的控制要求。
由于线性模型预测控制不适用于结构复杂、具有强非线性的被控系统，因此，进一步研究了非线性模型预测控制在发动机怠速控制系统中的应用。首先基于建立的发动机模型设计了发动机怠速控制的非线性模型预测控制器，分别采用序列二次规划法和约束粒子群方法求解非线性规划问题，通过离线仿真实验对比分析了两种优化算法的控制效果和计算性能。离线实验结果表明非线性模型预测控制器的控制效果很好，但是控制器不能在怠速控制要求的20ms内快速求出解。因此，采用FPGA全硬件方案设计实现了非线性模型预测控制器，利用流水线结构和循环展开进一步提高了控制器的计算速度。然后在搭建的实验平台上进行了实时控制实验，实验结果表明基于FPGA实现的NMPC控制器使得计算时间由31.738ms降低到2.34ms，很好地满足了发动机怠速控制的实时性要求。最后，通过高精度的enDYNA发动机模型的实时实验，进一步验证了非线性模型预测控制器的有效性，为实车试验提供了实验基础。
论文对所提出的简便高效的优化求解方法进行了详尽的推导，并对模型预测控制器的硬件实现方案给出了详尽的设计开发流程。为了验证本文所提出方法的有效性，进行了电子节气门位置跟踪控制和发动机怠速控制应用的实时控制实验，并给出了实验结果和相关分析，结果表明，本文所提的模型预测控制的求解算法和硬件实现方法具有很好的实时性，并将模型预测控制成功应用于汽车控制快速系统。本文的研究工作需要进一步完善的有：(1)研究带约束粒子群方法的收敛性；(2)由于采用转换工具生成的硬件代码存在冗余，进一步研究手工编写硬件描述语言的FPGA全硬件实现方法；(3)由于只进行了模型预测控制器的硬件在环实验，今后围绕实车试验展开进一步研究。
Owing to its ability to handle multi-variable/multi-objective problems and deal withhard constraints explicitly, model predictive control (MPC) has become an attractivefeedback strategy in a broad range of systems, and its application has been extendedfrom process industry systems to fast dynamic systems. Due to MPC requires repeatedonline solution of a receding horizon optimization problem at every sampling instant,the computation load remains the main challenge for the real-time practical applicationof MPC especially for fast systems. Moreover, fast systems require the MPC controllerto be high computational performance, miniaturization and high-level integration on achip. Therefore, online solution of optimization problem and hardware implementationof MPC controller are two critical open issues for MPC applications. This thesis mainlystudies the field programmable gate array (FPGA) implementation and application offast model predictive control, and aims at lowering the practical burden of applying fastMPC algorithms in the real-world.
In order to improve the computational efciency of MPC, the first part of this the-sis focuses on efciently solving optimization problems as arising in MPC. This thesisproposes a constrained particle swarm optimization (PSO) method. Firstly, the compu-tational formula and detailed calculation steps of basic PSO are given. Secondly, penaltyfunction approach is employed to deal with system constrains. In combination withsimple iteration and parallel computation of basic PSO, the constrained particle swarmmethod has the ability to solve optimization problems quickly. Finally, linear and nonlin-ear simulation tests of MPC are performed to verify the availability of the proposed PSOmethod and to compare the computational performance of these optimization methods.Simulation results show the availability of these algorithm. The comparative analysis ofconstrained PSO and commonly used optimization algorithms provides theoretical basisfor hardware implementation.
Considering with the demands of fast dynamic systems, hardware implementationschemes for MPC on FPGA chip are proposed to meet these requirements. This scheme uses FPGA to explore the possibilities of pipelined architecture and parallel hardware forthe substantial acceleration of MPC. Firstly, an embedded implementation scheme basedon FPGA and system on a programmable chip (SoPC) technology is presented. A Nios IIsoft core processor is embedded into the FPGA chip and then the hardware and softwaresystem of SoPC are designed. The computational efciency of time-critical arithmeticoperations is enhanced by designing custom instructions of float-point operations andcustom hardware accelerators of matrix operations. This scheme consumes few hardwareresources and is very flexible to be extended and updated. Secondly, a full hardwareimplementation method on FPGA is given, and semi-automatic modular method is usedto design MPC controller on FPGA. Based on algorithm analysis, MPC algorithm can beoptimized by parallelism-loop unrolling and pipelining to obtain fast online computationalspeed. Compared to the embedded scheme, this full hardware implementation methodhas better computational efciency, but it consumes more hardware resources. Finally,numerical examples implemented on FPGA are performed to analyze the computationalperformance between these two hardware implementation schemes.
For purpose of realizing real-time practical application of MPC, we apply linear modelpredictive control (LMPC) to the electronic throttle control system and real-time test isperformed. According to throttle structure, we establish a control-oriented mathemat-ical model of electronic throttle and give the control requirements of throttle control.Based on the established model, a LMPC controller is designed and active set, interiorpoint and constrained PSO methods are utilized to solve the optimization problem respec-tively. The computational performance of these three optimization methods are comparedand analyzed through ofine simulation tests. The ofine simulation results show thatthese optimization methods can achieve satisfactory control efect, but can not meet thereal-time computational requirement of1ms sampling time. Therefore, the hardware ac-celeration method based on FPGA is utilized to further enhance the computational speed.Then LMPC controller with active set method implemented by embedded FPGA schemeand LMPC controller with PSO method implemented by FPGA full hardware schemeare designed respectively. For the validation of these two LMPC controllers, we buildup a prototyping platform. The real-time experiment results demonstrate that these twoLMPC controllers implemented on FPGA have good computational performance and canachieve satisfactory control performance of electronic throttle.
Due to many systems are inherently nonlinear, linear models are unsuitable to de-scribe the nonlinear process dynamics. It motivates the increasing interest in nonlinearmodel predictive control (NMPC). Therefore the application of NMPC in engine idle speedcontrol problem is investigated. With the established nonlinear engine model, we design a NMPC controller for idle speed control and use sequential quadratic programming (SQP)and PSO methods to solve the NLP problem formed by NMPC. The ofine simulationresults indicate that the NMPC controller has good control efect, but can not obtain thesolutions within20ms sampling interval. With the help of pipelined architecture and par-allel hardware of FPGA, the computational efciency of NMPC controller is substantiallyincreased by using parallelism-loop unrolling and pipelining process. Finally the con-structed engine model and the high precision enDYNA engine model are used to validatethe efciency of the designed controller. The real-time experimental results demonstratethat the NMPC controller implemented on FPGA reduces the computational time from31.738ms to2.34ms. Therefore, the designed NMPC controller has good computationalperformance and achieves satisfactory performance for engine idle speed control problem.This study provides the experimental basis for in-vehicle tests.
In this paper, we not only present the detailed derivation process of efciently solvingoptimization methods, but also give the hardware implementation process of the MPCcontroller in detail. To validate the efectiveness of the proposed methods, we performthe real-time experiments of electronic throttle control and engine idle speed control re-spectively, and give experiment results and analysis. The results demonstrate that theproposed optimization methods and hardware implementation schemes have good com-putational performance, and make model predictive control apply to automobile controlsystem successfully. There are some topics that still remain to be studied, further researchwork includes:(1) The convergence of constrained PSO method needs to be studied;(2)The automatically generated circuit has more resource consumption and is not as ef-cient as that in manual design, so new FPGA implementation method based on hardwaredescription language designed by manual should be researched;(3) We only performedhardware-in-the-loop experiments until now, in-vehicle tests should be carried out in thefuture.
为了快速求解模型预测控制的约束优化问题，提出了约束粒子群优化方法。首先给出了基本粒子群方法的计算公式和算法步骤，然后采用惩罚函数法处理约束，结合基本粒子群方法的迭代逻辑简单、可并行计算等特性，使得约束粒子群方法具有快速求解优化问题的能力。最后，通过模型预测控制的线性和非线性两个实例仿真实验，验证了约束粒子群优化方法的有效性。同时将约束粒子群法与常用的优化算法进行了对比分析，为控制器的硬件实现提供了算法基础。
为满足新应用领域对控制器提出的高实时性、微型化、高集成度等新需求，提出了模型预测控制器的FPGA硬件加速实现方法，利用FPGA的灵活性和硬件并行计算特性，实现了控制器的可配置化和快速计算。首先提出了基于FPGA的SoPC（Systemon Programmable Chip）嵌入式系统实现方法，该方法在FPGA中嵌入Nios II软核处理器，并进行SoPC系统的硬件和软件设计，通过浮点自定义指令和矩阵运算自定制组件的设计提高控制算法的在线计算性能，该实现方案具有较强的灵活性，占用的硬件资源较少。然后，提出了FPGA全硬件实现方案，采用半自动模块化的FPGA方法进行控制器的设计。根据算法的优化分析，对控制算法的耗时计算步骤进行流水线和循环展开处理，充分利用FPGA并行计算结构提升模型预测控制器的在线求解速度，该实现方法占用的硬件资源较多，但是具有更好的实时性。最后，通过数值实例的FPGA实现，分析比较了两种FPGA实现方案的计算性能。
从实际应用的角度，研究了线性模型预测控制在电子节气门控制中的应用。首先根据节气门的组成结构建立了电子节气门数学模型，并给出了节气门的控制要求。然后，基于该模型设计了电子节气门位置跟踪模型预测控制器，分别采用积极集法、内点法和约束粒子群法求解二次规划问题，通过离线仿真实验对比分析了三种优化算法的控制效果和计算性能。离线实验结果表明三种优化算法都具有很好的控制效果，但是均不能在节气门要求的1ms采样时间内求出解。为了进一步提高算法的实时性，采用FPGA硬件加速方法，分别设计实现了基于积极集法的FPGA嵌入式模型预测控制器和基于粒子群法的FPGA全硬件模型预测控制器，并在搭建的实验平台上分别进行了两种控制器的实时实验测试，实验结果验证了两种基于FPGA实现的线性模型预测控制器的实时性和有效性，很好地满足了节气门的控制要求。
由于线性模型预测控制不适用于结构复杂、具有强非线性的被控系统，因此，进一步研究了非线性模型预测控制在发动机怠速控制系统中的应用。首先基于建立的发动机模型设计了发动机怠速控制的非线性模型预测控制器，分别采用序列二次规划法和约束粒子群方法求解非线性规划问题，通过离线仿真实验对比分析了两种优化算法的控制效果和计算性能。离线实验结果表明非线性模型预测控制器的控制效果很好，但是控制器不能在怠速控制要求的20ms内快速求出解。因此，采用FPGA全硬件方案设计实现了非线性模型预测控制器，利用流水线结构和循环展开进一步提高了控制器的计算速度。然后在搭建的实验平台上进行了实时控制实验，实验结果表明基于FPGA实现的NMPC控制器使得计算时间由31.738ms降低到2.34ms，很好地满足了发动机怠速控制的实时性要求。最后，通过高精度的enDYNA发动机模型的实时实验，进一步验证了非线性模型预测控制器的有效性，为实车试验提供了实验基础。
论文对所提出的简便高效的优化求解方法进行了详尽的推导，并对模型预测控制器的硬件实现方案给出了详尽的设计开发流程。为了验证本文所提出方法的有效性，进行了电子节气门位置跟踪控制和发动机怠速控制应用的实时控制实验，并给出了实验结果和相关分析，结果表明，本文所提的模型预测控制的求解算法和硬件实现方法具有很好的实时性，并将模型预测控制成功应用于汽车控制快速系统。本文的研究工作需要进一步完善的有：(1)研究带约束粒子群方法的收敛性；(2)由于采用转换工具生成的硬件代码存在冗余，进一步研究手工编写硬件描述语言的FPGA全硬件实现方法；(3)由于只进行了模型预测控制器的硬件在环实验，今后围绕实车试验展开进一步研究。
Owing to its ability to handle multi-variable/multi-objective problems and deal withhard constraints explicitly, model predictive control (MPC) has become an attractivefeedback strategy in a broad range of systems, and its application has been extendedfrom process industry systems to fast dynamic systems. Due to MPC requires repeatedonline solution of a receding horizon optimization problem at every sampling instant,the computation load remains the main challenge for the real-time practical applicationof MPC especially for fast systems. Moreover, fast systems require the MPC controllerto be high computational performance, miniaturization and high-level integration on achip. Therefore, online solution of optimization problem and hardware implementationof MPC controller are two critical open issues for MPC applications. This thesis mainlystudies the field programmable gate array (FPGA) implementation and application offast model predictive control, and aims at lowering the practical burden of applying fastMPC algorithms in the real-world.
In order to improve the computational efciency of MPC, the first part of this the-sis focuses on efciently solving optimization problems as arising in MPC. This thesisproposes a constrained particle swarm optimization (PSO) method. Firstly, the compu-tational formula and detailed calculation steps of basic PSO are given. Secondly, penaltyfunction approach is employed to deal with system constrains. In combination withsimple iteration and parallel computation of basic PSO, the constrained particle swarmmethod has the ability to solve optimization problems quickly. Finally, linear and nonlin-ear simulation tests of MPC are performed to verify the availability of the proposed PSOmethod and to compare the computational performance of these optimization methods.Simulation results show the availability of these algorithm. The comparative analysis ofconstrained PSO and commonly used optimization algorithms provides theoretical basisfor hardware implementation.
Considering with the demands of fast dynamic systems, hardware implementationschemes for MPC on FPGA chip are proposed to meet these requirements. This scheme uses FPGA to explore the possibilities of pipelined architecture and parallel hardware forthe substantial acceleration of MPC. Firstly, an embedded implementation scheme basedon FPGA and system on a programmable chip (SoPC) technology is presented. A Nios IIsoft core processor is embedded into the FPGA chip and then the hardware and softwaresystem of SoPC are designed. The computational efciency of time-critical arithmeticoperations is enhanced by designing custom instructions of float-point operations andcustom hardware accelerators of matrix operations. This scheme consumes few hardwareresources and is very flexible to be extended and updated. Secondly, a full hardwareimplementation method on FPGA is given, and semi-automatic modular method is usedto design MPC controller on FPGA. Based on algorithm analysis, MPC algorithm can beoptimized by parallelism-loop unrolling and pipelining to obtain fast online computationalspeed. Compared to the embedded scheme, this full hardware implementation methodhas better computational efciency, but it consumes more hardware resources. Finally,numerical examples implemented on FPGA are performed to analyze the computationalperformance between these two hardware implementation schemes.
For purpose of realizing real-time practical application of MPC, we apply linear modelpredictive control (LMPC) to the electronic throttle control system and real-time test isperformed. According to throttle structure, we establish a control-oriented mathemat-ical model of electronic throttle and give the control requirements of throttle control.Based on the established model, a LMPC controller is designed and active set, interiorpoint and constrained PSO methods are utilized to solve the optimization problem respec-tively. The computational performance of these three optimization methods are comparedand analyzed through ofine simulation tests. The ofine simulation results show thatthese optimization methods can achieve satisfactory control efect, but can not meet thereal-time computational requirement of1ms sampling time. Therefore, the hardware ac-celeration method based on FPGA is utilized to further enhance the computational speed.Then LMPC controller with active set method implemented by embedded FPGA schemeand LMPC controller with PSO method implemented by FPGA full hardware schemeare designed respectively. For the validation of these two LMPC controllers, we buildup a prototyping platform. The real-time experiment results demonstrate that these twoLMPC controllers implemented on FPGA have good computational performance and canachieve satisfactory control performance of electronic throttle.
Due to many systems are inherently nonlinear, linear models are unsuitable to de-scribe the nonlinear process dynamics. It motivates the increasing interest in nonlinearmodel predictive control (NMPC). Therefore the application of NMPC in engine idle speedcontrol problem is investigated. With the established nonlinear engine model, we design a NMPC controller for idle speed control and use sequential quadratic programming (SQP)and PSO methods to solve the NLP problem formed by NMPC. The ofine simulationresults indicate that the NMPC controller has good control efect, but can not obtain thesolutions within20ms sampling interval. With the help of pipelined architecture and par-allel hardware of FPGA, the computational efciency of NMPC controller is substantiallyincreased by using parallelism-loop unrolling and pipelining process. Finally the con-structed engine model and the high precision enDYNA engine model are used to validatethe efciency of the designed controller. The real-time experimental results demonstratethat the NMPC controller implemented on FPGA reduces the computational time from31.738ms to2.34ms. Therefore, the designed NMPC controller has good computationalperformance and achieves satisfactory performance for engine idle speed control problem.This study provides the experimental basis for in-vehicle tests.
In this paper, we not only present the detailed derivation process of efciently solvingoptimization methods, but also give the hardware implementation process of the MPCcontroller in detail. To validate the efectiveness of the proposed methods, we performthe real-time experiments of electronic throttle control and engine idle speed control re-spectively, and give experiment results and analysis. The results demonstrate that theproposed optimization methods and hardware implementation schemes have good com-putational performance, and make model predictive control apply to automobile controlsystem successfully. There are some topics that still remain to be studied, further researchwork includes:(1) The convergence of constrained PSO method needs to be studied;(2)The automatically generated circuit has more resource consumption and is not as ef-cient as that in manual design, so new FPGA implementation method based on hardwaredescription language designed by manual should be researched;(3) We only performedhardware-in-the-loop experiments until now, in-vehicle tests should be carried out in thefuture.
引文
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