新型碳化硅微波功率MESFET结构设计及性能分析
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摘要
碳化硅(SiC)材料具有宽禁带、高电子饱和漂移速率、高临界击穿场强、高热导率等优良特性,在高频、高温、大功率、抗辐射等领域拥有极为广阔的应用前景。随着无线通信技术的飞速发展,对硬件系统高功率密度、快响应速度的需求日益迫切,基于SiC材料的肖特基栅场效应晶体管(MESFET)在微波射频领域具有Si、GaAs器件无法比拟的优势,适合航天、微波通信、电子对抗、大容量信息处理等应用。鉴于国内外SiC MESFET研究现状,本文从器件结构、数值仿真、可靠性、制备工艺等方面对SiC MESFET开展了系统的研究分析。主要的研究工作和成果如下：
(1)从工作机理的角度分析了SiC微波功率MESFET的器件特性,整合了准确表征4H-SiC材料特性和MESFET器件工作机理的物理模型,并基于ISE-TCAD软件建立了合适的4H-SiC MESFET器件模型,对器件的直流、交流、击穿特性进行了模拟分析,并讨论了器件特性与关键结构参数的依赖关系,优化了器件结构,为器件设计提供了参考。
(2)SiC与钝化材料之间高密度的界面态导致器件工作在较高频率时出现栅延迟现象,影响器件的性能指标。为抑制界面态的陷阱效应,提出了一种新型隔离层结构的SiC MESFET并设计了针对该结构器件制备的工艺流程。基于改进的陷阱模型对栅长为0.6μm的器件进行了特性模拟研究。结果表明,P型隔离层能有效地抑制表面陷阱的影响并且能减小器件在大电压微波应用条件下的栅漏电容；P型隔离层结合场板结构改善了栅极边缘的电场分布,同时能减小单一使用场板结构时引入的寄生栅漏电容。新结构4H-SiC MESFET的最大饱和漏电流密度为460mA/mm,在漏电压20V的栅延迟抑制比接近90%。交流特性的分析结果表明,新结构比埋栅-场板结构器件的特征频率(ft)和最高振荡频率(fmax)分别提高了5%和17.8%。
(3)基于电场调制的思想,在分析场板结构器件所存在问题的基础上,建立了带栅漏间表面p型外延层的新型MESFET器件模型,模型综合考虑了高场载流子饱和、雪崩碰撞离化等效应。利用所建模型分析了表面外延层对器件沟道表面电场分布的改善作用,并采用突变结近似法对外延层参数与器件输出电流(Ids)和击穿电压(VB)的关系进行了研究。经过优化的结果表明,选择P型外延层厚度为0.12μm,掺杂浓度为5×1015cm-3,可使器件的VB提高33%而保持Ids基本不变,在一定程度上改善了导通电阻和击穿电压之间的矛盾。
(4)为进一步提升器件的频率特性,将栅下缓冲层结构应用于SiC MESFET中,并结合P型隔离层使器件的特性得以整体性提升。在钝化层和沟道之间引入的p型隔离层抑制了表面陷阱的影响,并改善了栅极边缘的电场分布。另一方面,在栅极下面引入的轻掺杂N型缓冲层降低了扩展在导电沟道中的耗尽层,从而提高了输出电流Ids并减小了栅电容Cg。论文还对器件特性与结构参数的依赖关系进行了研究,获得了优化的设计方案。在击穿电压VB有所提高的情况下,栅下缓冲层结构MESFET的最大饱和电流密度为325mA/mm,与传统结构MESFET的182mA/mm相比有将近79%的提升。此外,应用新结构的MESFET的特征频率和最大振荡频率较传统结构MESFET分别提高了27%和28%。
(5)在分析短沟道器件所存在问题的基础上,针对深亚微米SiC MESFET提出了改进型的异质栅结构,并结合肖特基栅势垒降低、势垒隧穿等物理模型,分析了改进型异质栅结构对SiC MESFET沟道电势、夹断电压以及栅下电场分布的影响。通过与传统栅器件特性的对比表明,异质栅结构在SiC MESFET的沟道电势中引入了多阶梯分布,加强了近源端电场；另一方面,相比于双栅器件,改进型异质栅器件沟道最大电势的位置远离源端,更好抑制了短沟道效应。此外,研究了不同结构参数的异质栅对短沟道器件特性的影响,获得了优化的设计方案,减小了器件的亚阈值倾斜因子。为发挥碳化硅器件在大功率应用中的优势,设计了非对称异质栅结构,提高了小栅长器件的耐压。
综上所述,本论文在传统SiC MSEFET基础上,提出了几种新型器件结构,通过器件建模和特性仿真对新结构器件进行了系统的研究,并进行了较为深入的分析和讨论,得到了一些有意义的结果,为SiC MSEFET的设计与研制提供了指导。
Silicon carbide (SiC) has found wide application in the fields of high-frequency, high-temperature, high-power and radio-resistant due to its excellent properties such wide gap, high electron saturation drift velocity, high critical electric field and high thermal conductivity. With the rapid development of wireless communication, there has been increasing demand for hardware with high power-density and fast frequency-response. SiC based metal-semiconductor field-effect transistors (MESFETs) have superior advantages over Si and GaAs based devices, being a suitable candidate for a wide range of commercial and military applications, including aerospace, microwave communication, electronic countermeasure, large capacity information processing, etc. In view of the domestic and overseas research status of MESFETs, this dissertation reveals a systemic investigation of the structure design, numerical simulation, reliability and practical application of the SiC MESFETs. The major studies and conclusive results are as follows.
(1) The characteristics of4H-SiC MESFETs are analyzed through working mechanism. Suitable device models are built and simulations have been performed using ISE-TCAD. Also, the characteristics dependences on the key structure parameters are discussed.
(2) The high density of interface states at SiC/oxide interfaces causes gate-lag phenomena in high-frequency operations, leading to the deteriorated performance. A novel structure of4H-SiC MESFETs is proposed focusing on surface trap suppression, and a device with a0.6μm gate length is investigated based on improved trap models. A P-type spacer layer is shown to suppress surface trap effect and reduce gate-drain capacitance under large drain voltage in microwave operation. The P-type spacer layer incorporated with a field-plate improves the electric field distribution on the gate edge while inducing less gate-drain capacitance than the field-plated structure. The maximum saturation current density of460mA/mm is yielded. Also, the gate-lag ratio under drain voltage of20V is close to90%. In addition, a5%and a17.8%improvement in ft and fmax are obtained compare with buried-gate and field-plated MESFET in AC simulation.
(3) Based on the theory of electric field modulation and the analysis of the disadvantages of the field-plated devices, the model of4H-SiC MESFET with a p-type surface epi-layer between the gate and the drain is established considering carrier velocity saturation and impact ionization. The improvement in distribution of the electric field is discussed and the output current (Ids) and breakdown voltage (VB) dependences on the dimensions of the p-type epi-layer are studied using abrupt junction approximation. The optimized design is obtained and the results show that VB is greatly increased by33%with Ids unchanged (less than3%) when the thickness and the doping concentration of the surface epi-layer are chosen as0.12μm and5×1015cm-3, respectively. This approach presents a solution to the constraint condition between Ids and VB.
(4) In order to improve the frequency characteristics, the gate-buffer approach is applied in SiC MESFETs. With the incorporated approach, the performance of the device is totally enhanced. A p-type spacer layer, inserted between the oxide and the channel, is shown to suppress surface trap effect and improve the distribution of electric field at the gate edge. Meanwhile, a light-doped n-type buffer layer under the gate reduces the depletion in the channel, resulting in an increase in the output current and a reduction in the gate-capacitance. The structure parameter dependences of the device performance are discussed and the optimized design is obtained. The results show the maximum saturation current density of325mA/mm is yielded compared with182mA/mm for conventional MESFET on condition that the breakdown voltage of the proposed MESFET is larger than that of the conventional MESFET, leading to an increase of79%in output power density. Also, improvements of27%cut-off frequency and28%maximum oscillation frequency are achieved compared with the conventional MESFET, respectively.
(5) Based on the analyses of the issue in short-channel devices, an improved hetero-material-gate (HMG) structure is proposed for deep sub-micron SiC MESFETs. Considering the physical models of Schottky barrier lowering and barrier tunneling, the effects of the HMG approach on the channel potential, pinch-off voltage and electric field distribution under the gate are analyzed. It is shown that the HMG approach induces a multi-stepped distribution of the channel potential, leading to an enhanced electric field at the source. Meanwhile, the position of the maximum of the channel potential is changed to the drain side compared with the dual-material-gate (DMG) device, resulting in a better restraint on short-channel effect. Also, different technological parameters and asymmetric gate structures are designed to study the dependences of the device performance, achieving a decreased sub-threshold swing an enhanced VB of the small scale device.
In summary, several novel structures of SiC MESFETs are proposed and the characterizations are performed in this dissertation. In-depth theoretical analyses are taken through device modeling and numerical simulation. A number of meaningful and instructive results have been obtained for the design and fabrication of SiC MESFETs.
(1)从工作机理的角度分析了SiC微波功率MESFET的器件特性,整合了准确表征4H-SiC材料特性和MESFET器件工作机理的物理模型,并基于ISE-TCAD软件建立了合适的4H-SiC MESFET器件模型,对器件的直流、交流、击穿特性进行了模拟分析,并讨论了器件特性与关键结构参数的依赖关系,优化了器件结构,为器件设计提供了参考。
(2)SiC与钝化材料之间高密度的界面态导致器件工作在较高频率时出现栅延迟现象,影响器件的性能指标。为抑制界面态的陷阱效应,提出了一种新型隔离层结构的SiC MESFET并设计了针对该结构器件制备的工艺流程。基于改进的陷阱模型对栅长为0.6μm的器件进行了特性模拟研究。结果表明,P型隔离层能有效地抑制表面陷阱的影响并且能减小器件在大电压微波应用条件下的栅漏电容；P型隔离层结合场板结构改善了栅极边缘的电场分布,同时能减小单一使用场板结构时引入的寄生栅漏电容。新结构4H-SiC MESFET的最大饱和漏电流密度为460mA/mm,在漏电压20V的栅延迟抑制比接近90%。交流特性的分析结果表明,新结构比埋栅-场板结构器件的特征频率(ft)和最高振荡频率(fmax)分别提高了5%和17.8%。
(3)基于电场调制的思想,在分析场板结构器件所存在问题的基础上,建立了带栅漏间表面p型外延层的新型MESFET器件模型,模型综合考虑了高场载流子饱和、雪崩碰撞离化等效应。利用所建模型分析了表面外延层对器件沟道表面电场分布的改善作用,并采用突变结近似法对外延层参数与器件输出电流(Ids)和击穿电压(VB)的关系进行了研究。经过优化的结果表明,选择P型外延层厚度为0.12μm,掺杂浓度为5×1015cm-3,可使器件的VB提高33%而保持Ids基本不变,在一定程度上改善了导通电阻和击穿电压之间的矛盾。
(4)为进一步提升器件的频率特性,将栅下缓冲层结构应用于SiC MESFET中,并结合P型隔离层使器件的特性得以整体性提升。在钝化层和沟道之间引入的p型隔离层抑制了表面陷阱的影响,并改善了栅极边缘的电场分布。另一方面,在栅极下面引入的轻掺杂N型缓冲层降低了扩展在导电沟道中的耗尽层,从而提高了输出电流Ids并减小了栅电容Cg。论文还对器件特性与结构参数的依赖关系进行了研究,获得了优化的设计方案。在击穿电压VB有所提高的情况下,栅下缓冲层结构MESFET的最大饱和电流密度为325mA/mm,与传统结构MESFET的182mA/mm相比有将近79%的提升。此外,应用新结构的MESFET的特征频率和最大振荡频率较传统结构MESFET分别提高了27%和28%。
(5)在分析短沟道器件所存在问题的基础上,针对深亚微米SiC MESFET提出了改进型的异质栅结构,并结合肖特基栅势垒降低、势垒隧穿等物理模型,分析了改进型异质栅结构对SiC MESFET沟道电势、夹断电压以及栅下电场分布的影响。通过与传统栅器件特性的对比表明,异质栅结构在SiC MESFET的沟道电势中引入了多阶梯分布,加强了近源端电场；另一方面,相比于双栅器件,改进型异质栅器件沟道最大电势的位置远离源端,更好抑制了短沟道效应。此外,研究了不同结构参数的异质栅对短沟道器件特性的影响,获得了优化的设计方案,减小了器件的亚阈值倾斜因子。为发挥碳化硅器件在大功率应用中的优势,设计了非对称异质栅结构,提高了小栅长器件的耐压。
综上所述,本论文在传统SiC MSEFET基础上,提出了几种新型器件结构,通过器件建模和特性仿真对新结构器件进行了系统的研究,并进行了较为深入的分析和讨论,得到了一些有意义的结果,为SiC MSEFET的设计与研制提供了指导。
Silicon carbide (SiC) has found wide application in the fields of high-frequency, high-temperature, high-power and radio-resistant due to its excellent properties such wide gap, high electron saturation drift velocity, high critical electric field and high thermal conductivity. With the rapid development of wireless communication, there has been increasing demand for hardware with high power-density and fast frequency-response. SiC based metal-semiconductor field-effect transistors (MESFETs) have superior advantages over Si and GaAs based devices, being a suitable candidate for a wide range of commercial and military applications, including aerospace, microwave communication, electronic countermeasure, large capacity information processing, etc. In view of the domestic and overseas research status of MESFETs, this dissertation reveals a systemic investigation of the structure design, numerical simulation, reliability and practical application of the SiC MESFETs. The major studies and conclusive results are as follows.
(1) The characteristics of4H-SiC MESFETs are analyzed through working mechanism. Suitable device models are built and simulations have been performed using ISE-TCAD. Also, the characteristics dependences on the key structure parameters are discussed.
(2) The high density of interface states at SiC/oxide interfaces causes gate-lag phenomena in high-frequency operations, leading to the deteriorated performance. A novel structure of4H-SiC MESFETs is proposed focusing on surface trap suppression, and a device with a0.6μm gate length is investigated based on improved trap models. A P-type spacer layer is shown to suppress surface trap effect and reduce gate-drain capacitance under large drain voltage in microwave operation. The P-type spacer layer incorporated with a field-plate improves the electric field distribution on the gate edge while inducing less gate-drain capacitance than the field-plated structure. The maximum saturation current density of460mA/mm is yielded. Also, the gate-lag ratio under drain voltage of20V is close to90%. In addition, a5%and a17.8%improvement in ft and fmax are obtained compare with buried-gate and field-plated MESFET in AC simulation.
(3) Based on the theory of electric field modulation and the analysis of the disadvantages of the field-plated devices, the model of4H-SiC MESFET with a p-type surface epi-layer between the gate and the drain is established considering carrier velocity saturation and impact ionization. The improvement in distribution of the electric field is discussed and the output current (Ids) and breakdown voltage (VB) dependences on the dimensions of the p-type epi-layer are studied using abrupt junction approximation. The optimized design is obtained and the results show that VB is greatly increased by33%with Ids unchanged (less than3%) when the thickness and the doping concentration of the surface epi-layer are chosen as0.12μm and5×1015cm-3, respectively. This approach presents a solution to the constraint condition between Ids and VB.
(4) In order to improve the frequency characteristics, the gate-buffer approach is applied in SiC MESFETs. With the incorporated approach, the performance of the device is totally enhanced. A p-type spacer layer, inserted between the oxide and the channel, is shown to suppress surface trap effect and improve the distribution of electric field at the gate edge. Meanwhile, a light-doped n-type buffer layer under the gate reduces the depletion in the channel, resulting in an increase in the output current and a reduction in the gate-capacitance. The structure parameter dependences of the device performance are discussed and the optimized design is obtained. The results show the maximum saturation current density of325mA/mm is yielded compared with182mA/mm for conventional MESFET on condition that the breakdown voltage of the proposed MESFET is larger than that of the conventional MESFET, leading to an increase of79%in output power density. Also, improvements of27%cut-off frequency and28%maximum oscillation frequency are achieved compared with the conventional MESFET, respectively.
(5) Based on the analyses of the issue in short-channel devices, an improved hetero-material-gate (HMG) structure is proposed for deep sub-micron SiC MESFETs. Considering the physical models of Schottky barrier lowering and barrier tunneling, the effects of the HMG approach on the channel potential, pinch-off voltage and electric field distribution under the gate are analyzed. It is shown that the HMG approach induces a multi-stepped distribution of the channel potential, leading to an enhanced electric field at the source. Meanwhile, the position of the maximum of the channel potential is changed to the drain side compared with the dual-material-gate (DMG) device, resulting in a better restraint on short-channel effect. Also, different technological parameters and asymmetric gate structures are designed to study the dependences of the device performance, achieving a decreased sub-threshold swing an enhanced VB of the small scale device.
In summary, several novel structures of SiC MESFETs are proposed and the characterizations are performed in this dissertation. In-depth theoretical analyses are taken through device modeling and numerical simulation. A number of meaningful and instructive results have been obtained for the design and fabrication of SiC MESFETs.
引文
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