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低温晶片键合技术及其在硅基长波长雪崩光电探测器中的应用研究
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摘要
本论文是围绕任晓敏教授任首席科学家的973计划项目(No:2003CB314902)以及课题组所承担的国家863重大基金项目(No:2006AA03Z416、2007AA03Z418)和国家自然科学基金资助项目(No:60576018)展开的。
     随着信息技术的迅速发展,大容量、高速率的信息传输处理能力已成为信息网络的迫切需求。用光子载体替代电子载体实现高速互连,以光子技术或光电子技术替代微电子技术,发展光集成技术或光电子集成技术,将把信息技术推向一个全新的阶段。本论文针对光电集成中的关键技术—低温晶片键合技术、基于键合技术的硅基长波长雪崩光电探测器的研制等开展了大量研究工作,并已取得以下主要研究成果:
     1.利用Suhir的多层薄膜的应力分析方法,分析了GaAs/InP、Si/InP键合晶片界面热应力的分布,给出了键合晶片界面的正应力、剪切应力以及剥离应力的分布特性:正应力在晶片中心处有最大值,在晶片边缘附近,正应力迅速下降直至为零,剪切应力和剥离应力在紧邻晶片边缘区域处值最大,随着远离边缘区域,迅速减小直至为零。降低退火温度(即低温键合)是减少热应力对键合影响的最有效的方法。
     2.发明了一种基于硼化物表面处理的低温晶片键合技术,实现了Si/InP、GaAs/InP、Si/Si基材料间简单无毒性的高质量的晶片键合,退火温度分别为270℃、290℃、180℃。键合样品的扫描电子显微镜图(SEM)和透射电镜测试图(TEM)表明键合的强度高;拉断测试显示晶片键合强度达到了MPa级。键合晶片的伏安特性、X射线衍射(XRD)及光致发光(PL)测试说明键合晶片有很好的光学和电学特性。
     3.X射线光电子能谱(XPS)和拉曼(Raman)测试可知硼化物溶液处理后的Si、InP和GaAs晶片表面的成键主要以Si-O-B、P-O-B和As-O-B的形式存在,Si/InP键合界面形成了厚度为21nm的B2O3-P2Ox-SiO2薄层,GaAs/InP键合界面形成了厚度为17nm的B2O3-P2Ox-As2O3薄层,这两个稳定的微观结构,保证了键合的质量。该研究成果已获得了一项发明专利。
     4.从载流子浓度连续性方程出发,利用矩阵代数的分析方法,通过分析器件每层结构的响应特性,推导得出吸收倍增分离结构APD的频率响应解析表达式。在此基础上,模拟了Si/InGaAs吸收区与倍增区分离(SAM)结构APD的频率响应特性,并着重分析了增益、倍增层厚度和吸收层厚度的变化对频率响应特性的影响。
     5.利用上述的Si/InP低温晶片键合技术,设计制造了Si基长波长雪崩光电探测器。该探测器为吸收倍增分离结构(SAM-APD),吸收层为InGaAs,增益层为Si,光敏面大小50×70μm2;测试结果表明器件有正常的光响应特性,击穿电压Vb为41V,0.9Vb时暗电流是0.1μA,光电流为0.7mA,倍增因子为19。器件的暗电流偏大的可能原因:键合界面的10nm的Si02层的隧道效应;N+型Si衬底过厚未减薄,可以通过减薄Si02层和N+型Si衬底来降低暗电流。
The reseach described in this thesis is supported by grants from The National Basic Research Program of China (No.2003CB314902), The National High Technology Research and Development Program of China (No:2006AA03Z416and2007AA03Z418), Key Program project of the National Natural Science Foundation of China(No.90201035) and the project of the National Natural Science Foundation of China(No:60576018).
     With the rapid development of information technology, it's becoming an urgent need for large capability, high speed transmission and management. Substituting photon for electron, photon technology or optoelectronic technology for micro-electronic technology, and developing optical integration or optoelectronic integration will push information technology to a brand-new period. In this thesis, a great deal of research work can be described as follow:low-temperature wafer bonding process based on boride treatment, designing and fabrication of Si based long-wavelength avalanche photodetector. The main achievements are listed as follows.
     1. The interfacial thermal stresses arising from wafer bonding were analysed by Suhir'stress theory in multilayered elastic thin films. Physical model was established, and the stresses distribution in the bonding interface of GaAs/InP、Si/InP were analysed. The calculation indicated that the normal stress at the interface were concentrated near the center of the bonding pair and minished to zero when moved from the center to the edge, and it's opposite for the shearing and peeling stresses. Reducing the annealing temperature was the most effective method to decrease the thermal stresses.
     2. An approach for Si/InP、GaAs/InP、Si/Si low-temperature wafer bonding based on boride treatment was presented, which were simple and nontoxic, and the annealing temperatures were270℃、290℃、180℃respectively. The scanning electron microscopy(SEM) and transmission electron microscope(TEM) images of the cleaving interface showed that the bonded wafers were tightly adhesive, and no fracture or void occurred along the bonded interface. The current-voltage characteristics, X-ray diffraction (XRD) and photoluminescence (PL) revealed that crystal quality of the bonded MQW was preserved with little inference to the electronic and optical characteristics. This low-temperature wafer bonding has been awarded a patent for invention.
     3. The X-ray photoelectron spectroscopy(XPS) and Raman spectroscopy analyses ensured the chemical bonds on the boride-treated Si、InP and GaAs wafer surfaces were Si-O-B|P-O-B and As-O-B respectively. These chemical bonds would reconstruct to form a stable structure after wafer bonded. For Si/InP wafer bonding, the intermediate layer was B2O3-P2Ox-SiO2with thickness of about21nm, and, for GaAs/InP wafer bonding, the intermediate layer was B2O3-P2Ox-As2O3with thickness of about17nm. These stable structures ensure the strong bonding at such low annealing temperature.
     4. The device model of Si/InGaAs SAM-APD (separate absorption and multiplication avalanche photodiode) was constructed based on Poisson equation and carrier continuity equation. The frequency response of device model was simulated by using matrix algebra method and the influence of multiplication factor, multiplication layer thickness and absorption layer thickness on frequency response characteristics was emphatically analyzed.
     5. Si based long-wavelength avalanche photodetector with Si Multiplication layer and InGaAs absorption layer has been designed and fabricated. The size of photosensitive surface is50x70μm2. The dark current at90%of the breakdown voltage (41V) is0.1μA. The photocurrent and multiplication factor at90%of the breakdown voltage (41V) and light power of2mw is0.7mA and19.
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