用户名: 密码: 验证码:
一种超低功耗SAR A/D转换器
详细信息    查看全文 | 推荐本文 |
  • 英文篇名:An Ultra-Low Power SAR A/D Converter
  • 作者:赵金强 ; 梅年松 ; 张钊锋 ; 孟令琴
  • 英文作者:ZHAO Jinqiang;MEI Niansong;ZHANG Zhaofeng;MENG Lingqin;School of Communication &Information Engineering,Shanghai University;Shanghai Advanced Research Institute,Chinese Academy of Sciences;
  • 关键词:逐次逼近A/D转换器 ; 超低功耗 ; 开关切换方式 ; 自举开关
  • 英文关键词:SAR A/D converter;;ultra-low power;;switching scheme;;bootstrapped switch
  • 中文刊名:MINI
  • 英文刊名:Microelectronics
  • 机构:上海大学通信与信息工程学院;中国科学院上海高等研究院;
  • 出版日期:2019-02-20
  • 出版单位:微电子学
  • 年:2019
  • 期:v.49;No.279
  • 语种:中文;
  • 页:MINI201901001
  • 页数:6
  • CN:01
  • ISSN:50-1090/TN
  • 分类号:4-9
摘要
基于TSMC 0.18μm CMOS工艺,设计了一种用于植入式生物传感器的超低功耗逐次逼近型(SAR)A/D转换器。采用改进的单调开关切换方式,实现了超低功耗。采用动态比较器,消除了静态功耗。采用改进的自举开关结构,提高了采样开关在低电源电压下的线性度。后仿真结果表明,该SAR A/D转换器在1kS/s采样率、0.6V电源电压的条件下,整体功耗仅为8.7nW,有效位数达到9.76位。
        An ultra-low power successive approximation register(SAR)analogue-to-digital converter for implantable biosensors was designed in TSMC 0.18μm CMOS process.An ultra-low power consumption was achieved by using a modied monotonic switching scheme.And a static power consumption was eliminated by using a dynamic comparator.A modified bootstrapped switch structure was adopted to improve the sampling switch linearity in low supply voltages.The post simulation results showed that the SAR A/D converter consumed 8.7 nW and achieved an ENOB of 9.76 bit at a sampling rate of 1 kS/s and a supply voltage of 0.6 V.
引文
[1]汪正锋.用于植入式医疗设备的超低功耗SAR ADC设计[D].成都:电子科技大学,2015.
    [2] ZHANG D,BHIDE A,ALVANDPOUR A.A 53-nW9.1-ENOB 1-kS/s SAR ADC in 0.13-μm CMOS for medical implant devices[J].IEEE J Sol Sta Circ,2012,47(7):1585-1593.
    [3] JEONG S,CHEN Y,JANG T,et al.A 12nW always-on acoustic sensing and object recognition microsystem using frequency-domain feature extraction and SVM classification[C]∥IEEE ISSCC.San Francisco,CA,USA.2017:362-363.
    [4] ELZAKKER M V,TUIJL E V,GERAEDTS P,et al.A 1.9μW 4.4fJ/conversion-step 10b1 MS/s charge-redistribution ADC[C]∥IEEE ISSCC.San Francisco,CA,USA.2008:244-245,610.
    [5] ELZAKKER M V,TUIJL E V,GERAEDTS P,et al.A 10bit charge-redistribution ADC consuming 1.9μW at 1 MS/s[J].IEEE J Sol Sta Circ,2010,45(5):1007-1015.
    [6] LIU C C,CHANG S J,HUANG G Y,et al.A 10-bit50-MS/s SAR ADC with a monotonic capacitor switching procedure[J].IEEE J Sol Sta Circ,2010,45(6):731-740.
    [7] ZHU Y,CHAN C H,CHIO U F,et al.A 10-bit100-MS/s reference-free SAR ADC in 90nm CMOS[J].IEEE J Sol Sta Circ,2010,45(6):1111-1121.
    [8] DESSOUKY M,KAISER A.Input switch configuration suitable for rail-to-rail operation of switched opamp circuits[J].Elec Lett,1999,35(1):8-10.
    [9] LIN J,MIYAHARA M,MATSUZAWA A.A 15.5dB,wide signal swing,dynamic amplifier using a common-mode voltage detection technique[C]∥IEEE Int Symp Circ&Syst.Riode Janeiro,Brazil.2011:21-24.

© 2004-2018 中国地质图书馆版权所有 京ICP备05064691号 京公网安备11010802017129号

地址:北京市海淀区学院路29号 邮编:100083

电话:办公室:(+86 10)66554848;文献借阅、咨询服务、科技查新:66554700