高速大容量数据存储器的研制
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摘要
高速、大容量、高密度、低功耗、低成本的信息存储技术是卫星及其他航天设
备信息获取、信息融合、信息传输和信息处理中的关键部件之一。早期星上海量数
据记录主要是使用磁带机，直至八十年代末和九十年代初各航天大国才开始研究使
用磁盘、磁光盘和固态记录器。随着电子技术的发展，半导体存贮器密度的提高，
因而普遍认为以DRAM、FLASH为主的固态大容量数据存储器无疑是解决空间飞
行器数据记录的主流方案。要设计一个满足要求的大容量存储器，以解决侦察卫星、
飞船等海量数据存储的问题，必须首先解决以下一些技术关键：1）如何构造大容量
数据存储器并对其进行有效的管理；2）如何提高数据的输入输出速率；3）如何提高
大容量存储器的安装密度以减少体积和重量；4）如何降低大容量存储器的维持功
耗；5）研究针对大容量存储器的更有效的纠错编码技术。在认真深入调研了国外最
新的相关资料后，本论文根据国际研制大容量存储器的经验和先进技术，结合国内
实际情况，设计出一种新型的高速大容量存储器。该设计方案采用FLASH代替原
来使用的DRAM，提高了存储器密度，并改善了对存储区的管理；它采用嵌入式系
统取代以前的单片机系统，提高了安装密度，简化了硬件设计，增进了整体性能；
另外，它采用PCI总线取代ISA总线，极大的提高了数据传输速率。同时，随着新
技术新产品的不断涌现，大容量存储器的设计指标也在不断提高、设计技术也将在
不断更新之中。
The information storage technique, characterized by its high speed, high density, low
power consumption and low cost, is one of the key techniques for information retrieving,
merging, transportation and process in the satellite and other equipment used in spacecraft.
In the early days, tape recorder was used in the spacecraft for the storage of mass data. It
was not until the end of I 980s thai the main space countries began to adopt magnetic disk,
magnetic-optic disk and solid state recorder. As the development of electronic technique,
the density of semiconductor memory device was increased. It is widely approved that
solid state rea,rder, with the DRAM and FLASH as its main storage medium, has become
a dominating solution for the storage of mass data in the spacecraft. To design a high-speed
solid state recorder (SSR) which can meet the requirements of storage of mass data on
satellite or spacecraft, one must solve the following key technical problems: 1) how to
fabricate a recorder with large memory capacity and to manage it efficiently; 2) how to
increase the input and output data transmitting speed; 3) how to increase the mounting
density and reduce volume and weight of SSR; 4) how to reduce the maintaining power
consumption of SSR and 5) how to develop a more effective method of error detecting and
correcting for the reliability of data stored in SSR. After thoroughly collecting and
seriously studying the most up-dated information on this field, this thesis will design a new
kind of high-speed SSR based on the advanced technique and experiences from abroad,
considering the domestic research conditions. The new solution adopted FLASH instead of
previously used DRAM to increase the capacity and improve the management of memory
space; it also adopted the embedded system instead of originally used microprocessor
based system to increase mounting density, simplify the hardware design and enhance the
overall performance of SSR. Moreover, it adopted PCI local bus instead of ISA, which
increases the transmitting speed dramatically. At the same time, due to the incessant
appearance of new technology, the standard to the design of SSR will be enhanced and the
techniques arc being renovated constantly.
备信息获取、信息融合、信息传输和信息处理中的关键部件之一。早期星上海量数
据记录主要是使用磁带机，直至八十年代末和九十年代初各航天大国才开始研究使
用磁盘、磁光盘和固态记录器。随着电子技术的发展，半导体存贮器密度的提高，
因而普遍认为以DRAM、FLASH为主的固态大容量数据存储器无疑是解决空间飞
行器数据记录的主流方案。要设计一个满足要求的大容量存储器，以解决侦察卫星、
飞船等海量数据存储的问题，必须首先解决以下一些技术关键：1）如何构造大容量
数据存储器并对其进行有效的管理；2）如何提高数据的输入输出速率；3）如何提高
大容量存储器的安装密度以减少体积和重量；4）如何降低大容量存储器的维持功
耗；5）研究针对大容量存储器的更有效的纠错编码技术。在认真深入调研了国外最
新的相关资料后，本论文根据国际研制大容量存储器的经验和先进技术，结合国内
实际情况，设计出一种新型的高速大容量存储器。该设计方案采用FLASH代替原
来使用的DRAM，提高了存储器密度，并改善了对存储区的管理；它采用嵌入式系
统取代以前的单片机系统，提高了安装密度，简化了硬件设计，增进了整体性能；
另外，它采用PCI总线取代ISA总线，极大的提高了数据传输速率。同时，随着新
技术新产品的不断涌现，大容量存储器的设计指标也在不断提高、设计技术也将在
不断更新之中。
The information storage technique, characterized by its high speed, high density, low
power consumption and low cost, is one of the key techniques for information retrieving,
merging, transportation and process in the satellite and other equipment used in spacecraft.
In the early days, tape recorder was used in the spacecraft for the storage of mass data. It
was not until the end of I 980s thai the main space countries began to adopt magnetic disk,
magnetic-optic disk and solid state recorder. As the development of electronic technique,
the density of semiconductor memory device was increased. It is widely approved that
solid state rea,rder, with the DRAM and FLASH as its main storage medium, has become
a dominating solution for the storage of mass data in the spacecraft. To design a high-speed
solid state recorder (SSR) which can meet the requirements of storage of mass data on
satellite or spacecraft, one must solve the following key technical problems: 1) how to
fabricate a recorder with large memory capacity and to manage it efficiently; 2) how to
increase the input and output data transmitting speed; 3) how to increase the mounting
density and reduce volume and weight of SSR; 4) how to reduce the maintaining power
consumption of SSR and 5) how to develop a more effective method of error detecting and
correcting for the reliability of data stored in SSR. After thoroughly collecting and
seriously studying the most up-dated information on this field, this thesis will design a new
kind of high-speed SSR based on the advanced technique and experiences from abroad,
considering the domestic research conditions. The new solution adopted FLASH instead of
previously used DRAM to increase the capacity and improve the management of memory
space; it also adopted the embedded system instead of originally used microprocessor
based system to increase mounting density, simplify the hardware design and enhance the
overall performance of SSR. Moreover, it adopted PCI local bus instead of ISA, which
increases the transmitting speed dramatically. At the same time, due to the incessant
appearance of new technology, the standard to the design of SSR will be enhanced and the
techniques arc being renovated constantly.
引文
1． Bruce Kaufman，Solid state recorders deliver new levels of performance and features for recce applications, SPIE Vol．3128, 1997
2． Bruce Kaufman，On the use of COTS VME-based hardware to implement high performance recce solid state recorders, SPIE Vol．3431，1998
3． Karl F．Strauss，Grant J．Stockton，The Cassini solid-state recorder：a high-capacity, radiation-tolerant high-performance unit, SPIE Vol．2803 1996
4． United States Patent，Number 5，408，628， Apr．18，1995， Odetits，Inc．， Anaheim，Calif．
5． United States Patent，Number 5，289，377，Feb．22，1994，TRW Inc．，Redondo Beach，Calif．
6． Wallace G．Fishell，Kenneth J．Handel and Jim Rader，High-speed solid state recorder for airborne recce, SPIE Vol．2829, 1996
7． Wallace G．Fishell，HSSR AIRBORNE AND GROUND INTERFACES，SPIE Vol．343l，1998
8． A．Chris Wikman，HSSR Development Progress， Orbital Sciences Corporation， Fairchild Defense Division, SPIE Vol．3128, 1997
9． Hubble Facts，National Aeronautics and Space Administration，1996
10． Jay D． Intwala ， SOLID STATE DATA RECORDER(SSDR) FOR AIRBORNE/SPACE ENVIRONMENT， I.F.T.，1993
11． Jack McCabe DESIGN AND DEVELOPMENT OF HIGH CAPACITY SPACEBORN MEMORY MODULES IN THE HIGH DENSITY INTERCONNECT(HDI) TECHNOLOGY FOR THE TROPICAL RAINFALL MEASURING MISSION(TRMM)， NASA／GSFC Flight Data Systems／Code 735， Proceedings of the 1997 16~th AIAA/IEEE Digital Avionics Systems, DASC．
12． Andrew J．Fox，Wayne E．Abare，Alan Boss，Suitability of COTS IBM 64M DRAM in Space， RADECS Proceedings of the 1997 4~th European Conference on Radiation and Its Effects on Components and Systems．IEEE
13． Boonsieng Benjauthrit，Larry Coady，Milan Trcka，An Overview of Error Control Codes for Data Storage， 1996 Int'l Nonvolatile Memory Technology Conference, 1996 IEEE.
14． H．B．Carrett，M．S．Johnson，J．M．Ratliff，A．Johnston，S．Anderson，W. J．Stapor， Single-Event Upset Effects on the Clementine Solid-state Data Recorder，Journal of Spacecraft and Rockets, Vol．32, No．6，November-December, 1995
15． M．S．Hodgart，Effcient coding and error monitoring for spacecraft digital memory,International Journal of Electronics, Vol．73, No．1, 1-36,1992
16． Tom Shanley,Don Anderson，PCI System Architecture，MindSare, Inc, 1999
17． PCI Local Bus Specification，version 2． 2，PCI Special Interest Group, 1998
18． PC/104 Specification，Version 2． 3，PC/104 Consortium, June 1996
19． PC/104-Plus Specification，Version 1． 1，PC/104 Consortium, June 1997
20． CoreMoudler~TM／p5e，P/N 5001481，Revision 1，Ampro Computers，Inc．1999
21． Datasheet：KM29U128T, Flash Memory，Samsung Electronics，April 10~th, 1999
22． APPLICATION NOTE for NAND Flash Memory(Revision 2． 0) ，Memory Product ＆Technology Division, Sumsung Electronics．December 28~th, 1999
23． Samsung ISA Board Introduction，Memory Product ＆ Technology Division,Samsung Electronics,August 22~nd, 2000
24． PCI 9050-1 Data Book，Version 1． 02，PLX Technology,December 1999
25． PCI 9050 RDK, Development Kit Manual，Version 1． 2，PLX Technology,January, 28, 1998
26． PLXMON，User’s Guide，Version 1． 1，PLX Technology,December 7, 2000
27． PCI 9050 Errata，Rev．1． 2，PLX Technology,May 2000
28． Application Repor, SPRA537A，TMS320C6000 HPI to PCI Interfacing Using the PLX PCI9050，Digital Signal Processing Solutions，June 1999
29． S5920，32bit PCI Bus Target Interface，Applied Micro Circuits Corporation， February 12，1997
30． Developer Kit Tips，Application Note，Revision 1，Applied Micro Circuits Corporation，January 20,1998
31． Datasheet：ST93CS46／ST93CS47，1K(64×16) Serial Micro wire EEPROM， SGS-THOMSON Microelectronics．June 1997
32． Datasheet：MIC29710／29712，7． 5A Fast-Response LDO Regulator,Micrel,1997
33． Datasheet：IDT74FCT164245T, Fast CMOS 16-bit Bi-directional 3． 3V To 5V Translator，Integrated Device Technology,Inc．1999
34． 沈美明，温冬婵，《IBM-PC 汇编语言程序设计》，清华大学出版社，1991
35． 刘显庆，刘仁普，《微机总线规范》，机械工业出版社，1995． 7
36． [美] Walter A．Triebel，《80X86／Pentium 处理器，硬件、软件及接口技术教程》， 清华大学出版社，1998
37． 张载鸿，《微型机 (PC系列) 接口控制教程》，清华大学出版社，1992
38． 俞承芳 虞惠华，《微机实验补充讲义》，复旦大学电子工程系，1995． 6
39． 章维贞等，《PADS Power 基础教程》，电子工业出版社，2000
2． Bruce Kaufman，On the use of COTS VME-based hardware to implement high performance recce solid state recorders, SPIE Vol．3431，1998
3． Karl F．Strauss，Grant J．Stockton，The Cassini solid-state recorder：a high-capacity, radiation-tolerant high-performance unit, SPIE Vol．2803 1996
4． United States Patent，Number 5，408，628， Apr．18，1995， Odetits，Inc．， Anaheim，Calif．
5． United States Patent，Number 5，289，377，Feb．22，1994，TRW Inc．，Redondo Beach，Calif．
6． Wallace G．Fishell，Kenneth J．Handel and Jim Rader，High-speed solid state recorder for airborne recce, SPIE Vol．2829, 1996
7． Wallace G．Fishell，HSSR AIRBORNE AND GROUND INTERFACES，SPIE Vol．343l，1998
8． A．Chris Wikman，HSSR Development Progress， Orbital Sciences Corporation， Fairchild Defense Division, SPIE Vol．3128, 1997
9． Hubble Facts，National Aeronautics and Space Administration，1996
10． Jay D． Intwala ， SOLID STATE DATA RECORDER(SSDR) FOR AIRBORNE/SPACE ENVIRONMENT， I.F.T.，1993
11． Jack McCabe DESIGN AND DEVELOPMENT OF HIGH CAPACITY SPACEBORN MEMORY MODULES IN THE HIGH DENSITY INTERCONNECT(HDI) TECHNOLOGY FOR THE TROPICAL RAINFALL MEASURING MISSION(TRMM)， NASA／GSFC Flight Data Systems／Code 735， Proceedings of the 1997 16~th AIAA/IEEE Digital Avionics Systems, DASC．
12． Andrew J．Fox，Wayne E．Abare，Alan Boss，Suitability of COTS IBM 64M DRAM in Space， RADECS Proceedings of the 1997 4~th European Conference on Radiation and Its Effects on Components and Systems．IEEE
13． Boonsieng Benjauthrit，Larry Coady，Milan Trcka，An Overview of Error Control Codes for Data Storage， 1996 Int'l Nonvolatile Memory Technology Conference, 1996 IEEE.
14． H．B．Carrett，M．S．Johnson，J．M．Ratliff，A．Johnston，S．Anderson，W. J．Stapor， Single-Event Upset Effects on the Clementine Solid-state Data Recorder，Journal of Spacecraft and Rockets, Vol．32, No．6，November-December, 1995
15． M．S．Hodgart，Effcient coding and error monitoring for spacecraft digital memory,International Journal of Electronics, Vol．73, No．1, 1-36,1992
16． Tom Shanley,Don Anderson，PCI System Architecture，MindSare, Inc, 1999
17． PCI Local Bus Specification，version 2． 2，PCI Special Interest Group, 1998
18． PC/104 Specification，Version 2． 3，PC/104 Consortium, June 1996
19． PC/104-Plus Specification，Version 1． 1，PC/104 Consortium, June 1997
20． CoreMoudler~TM／p5e，P/N 5001481，Revision 1，Ampro Computers，Inc．1999
21． Datasheet：KM29U128T, Flash Memory，Samsung Electronics，April 10~th, 1999
22． APPLICATION NOTE for NAND Flash Memory(Revision 2． 0) ，Memory Product ＆Technology Division, Sumsung Electronics．December 28~th, 1999
23． Samsung ISA Board Introduction，Memory Product ＆ Technology Division,Samsung Electronics,August 22~nd, 2000
24． PCI 9050-1 Data Book，Version 1． 02，PLX Technology,December 1999
25． PCI 9050 RDK, Development Kit Manual，Version 1． 2，PLX Technology,January, 28, 1998
26． PLXMON，User’s Guide，Version 1． 1，PLX Technology,December 7, 2000
27． PCI 9050 Errata，Rev．1． 2，PLX Technology,May 2000
28． Application Repor, SPRA537A，TMS320C6000 HPI to PCI Interfacing Using the PLX PCI9050，Digital Signal Processing Solutions，June 1999
29． S5920，32bit PCI Bus Target Interface，Applied Micro Circuits Corporation， February 12，1997
30． Developer Kit Tips，Application Note，Revision 1，Applied Micro Circuits Corporation，January 20,1998
31． Datasheet：ST93CS46／ST93CS47，1K(64×16) Serial Micro wire EEPROM， SGS-THOMSON Microelectronics．June 1997
32． Datasheet：MIC29710／29712，7． 5A Fast-Response LDO Regulator,Micrel,1997
33． Datasheet：IDT74FCT164245T, Fast CMOS 16-bit Bi-directional 3． 3V To 5V Translator，Integrated Device Technology,Inc．1999
34． 沈美明，温冬婵，《IBM-PC 汇编语言程序设计》，清华大学出版社，1991
35． 刘显庆，刘仁普，《微机总线规范》，机械工业出版社，1995． 7
36． [美] Walter A．Triebel，《80X86／Pentium 处理器，硬件、软件及接口技术教程》， 清华大学出版社，1998
37． 张载鸿，《微型机 (PC系列) 接口控制教程》，清华大学出版社，1992
38． 俞承芳 虞惠华，《微机实验补充讲义》，复旦大学电子工程系，1995． 6
39． 章维贞等，《PADS Power 基础教程》，电子工业出版社，2000
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