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数模混合型滤波器设计及其仿真
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摘要
随着社会信息化的进程越来越快,从上个世纪80年代后期,数字信号处理算法的功能日益增强,集成电路技术的进步,许多传统上用模拟电路实现的信号处理功能很容易用数字方式来实现。但是,随着信号数据率的提高和信号带宽的增加,导致数字信号处理电路规模和功耗增大。因此,不能满足未来信息社会对电子系统中小型化和低功耗的发展要求。随着微电子技术的不断发展,模拟器件或数模混合型器件在高速、低功耗电路的优势逐渐突显出来。基于此背景,针对传统的滤波器电路本文提出了一种数模混合型实现方法,其核心是用数字电路控制的模拟电路对时域离散、幅度连续的信号进行处理。
     首先,本文介绍了数模混合型滤波器的概念和特点,从高速、低功耗两方面考虑,提出了数模混合型滤波器不同的实现结构。对CDMA通信系统中数模混合型序列匹配滤波器的实现结构进行了详细的介绍,结合序列型匹配滤波器的数模混合型实现方法,提出了FIR滤波器的数模混合型实现结构,并对其结构进行了MATLAB仿真。
     其次,利用CMOS器件的优点,研究了基于CMOS运放实现的数模混合型滤波器的实现方法。对基于CMOS运放实现的序列型匹配滤波器的电路结构及其工作原理进行了详细介绍,参考序列型匹配滤波器的实现结构提出了基于CMOS运放实现的FIR滤波器的实现结构,对其电路结构和工作原理进行了详细的讨论。与全数字滤波器电路相比,简化了电路结构,同时大大减少了元器件的数目。
     再次,为了验证滤波器电路功能的正确性,采用PSpice仿真软件分别对基于CMOS运放实现的序列型匹配滤波器和FIR滤波器进行了仿真验证,对不同参数下仿真结果产生的误差进行了分析,并提出了基于CMOS运放实现的FIR滤波器的改进方法。
     最后,对神经元MOS的结构和特性进行了介绍,并提出了基于神经元MOS实现的FIR滤波器的实现方法。该方法采用互补型神经元MOS源极跟随器来实现滤波器电路的关键部分——加权求和电路,对其电路结构和电路工作原理进行了详细的讨论,用PSpice软件对其进行了仿真验证,表明了其功能的正确性。
With more and more rapid progress of the information society, from the late 80's of the last century, the functions of the digital signal processing are enhanced day by day. With the developing of integrated circuit technology, many signal processing function realized by traditional analog circuits can be achieved by digital signal processing. However, With the increases of signal data rate and signal bandwidth, the scale of digital signal processing circuit is large, which need more power consumption. So it can not meet the requirement of miniaturization and lower power consumption of electronic system in the coming information society. With the continuous development of microelectronic technology, the advantage of analog or mixed analog-digital equipment is more obvious in the high-speed and low-power consumption circuit. According to this background, this paper presents a mixed analog-digital signal processing methods, the core of which is to use the analog circuit controlled by digital circuit to process the continuous signal with discrete time-domain.
     Firstly, this paper introduces the concepts and features of the mixed analog-digital filter and proposes the different realized structure of mixed analog-digital filter in the aspects of high-speed and low power consumption. The implemented structure of the mixed analog-digital sequence matched filter of CDMA communication system was detailed presented. Also, this paper introduces the mixed analog-digital realized structure of FIR filter according to the mixed analog-digital realized method of sequence matched filter, and its structure was confirmed by MATLAB software.
     Secondly, with the advantages of CMOS devices, the sequence matched filter implemented by CMOS operational amplifiers was presented the realized method of mixed analog-digital filter is worked out based on the CMOS operational amplifiers. It, which structure and working principle are described in detail. This paper introduces the realized structure of FIR filter and discusses the circuit structure and working principle of it, then finish the MATLAB simulation. Comparing with all-digital filter circuit, this method simplifies circuit structure and reduces device quantity.
     Thirdly, in order to verify correctness of filter circuit function, this paper uses PSpice simulation software to confirm the sequence matched filter and FIR filter realized based on CMOS operational amplifiers. And analysis the error of simulation results under different parameters, and introduces improving realized method of FIR filter based on CMOS operational amplifiers.
     Finally, neuron MOS structure and characteristics are introduced, and FIR filter realized method based on neuron MOS was presented. The method uses complementary neuron MOS source follower circuit filter to achieve the key part of filter circuit-weighted sum. Then this paper discusses its circuit structure and working principle in detail, and uses the simulation results of PSpice software to verify the correctness of its functions.
引文
[l]许晓东,王文博,杨大成.宽带CDMA数字中频接收机[J].通信学报,2001,22(8):87-92.
    [2]曹叶文,杨传风.DS/CDMA信号的数字接收技术[J].山东工业大学学报,1999,29(6):586-592.
    [3]崔亮,杨明.现代通信技术的未来发展方向[J].科技论坛,2005,(24):36-37.
    [4]闵昊.中国集成电路的现状和发展趋势分析[J].电子技术,2004,(1):5-7.
    [5]程玥,许军.神经元晶体管的研究进展[J].微电子学,2004,34(3):231-234.
    [6]冯亚林,张蜀平.集成电路的现状及其发展趋势[J].微电子学,2006,36(2):173-176.
    [7]崔增文,何山虎等.标准CMOS工艺在高速模拟电路和数模混合电路中的应用展望[J].半导体技术,2003,28(4):30-33.
    [8]Shibata Tadashi, and Ohmi Tadahiro. A Function MOS Transistor Featuring Gate-Level Weighted Sum and Threshold Operations[J]. IEEE Trans. On Electron Devices,1992,39(6):1444-1455.
    [9]Shibata, T.and Ohmi T. Neuron MOS binary-logic integrated circuits, Part Ⅱ, Simplifying techniques of circuit configuration and their practical applications[J]. IEEE Trans. Electron Device.1993,40(5):974-979.
    [10]郑春龙.PSpice在数模混合电路分析中的应用[J].电子技术,1999,(12):563—565.
    [11]刘允,肖明,唐建平,徐政.数模混合电路的工艺开发[J].微电子技术,2002,30(2):34-36.
    [12]Gilhousen K S. On the capacity of a cellular CDMA system[J]. IEEE Trans on Veh Tech,1991, 40(5):302-312.
    [13]Hui GUAN and Yusheng TANG. Accurate and efficient models for the simulation of neuron MOS integrated circuits[J]. INT.J. ELECTRONIC,2000,87(5):557-568.
    [14]管慧,汤玉生.神经元MOS晶体管[J].半导体技术,2000,25(1):2-7.
    [15]王明宇,汤玉生,管慧.电阻耦合型神经元MOS晶体管及其四象限模拟乘法器[J].固体电子学研究与进展,2002,22(2):158-163.
    [16]Chen J, Shou G L, Zhou C M. Digital-controlled analog circuits for weighted-sum operations: architecture, implementation and applications[J]. IEICE Trans Fundamentals,1999,82(1): 2505-2513.
    [17]Chen J, Shou G L, Zhou C M. High-speed low-power complex matched filter for W-CDMA: Algorithm and VLSI-Architecture[J]. IEICE Trans Fundamentals,2000,83 (1):150-157.
    [18]陈东.OrCAD电路设计[M].北京:国防工业出版社,2004:10-30.
    [19]刘根泉,徐光藻,王长福,仝茂达译.现代滤波器设计有源RC和开关电容[M].北京:科学出版社,1989:107-129.
    [20]魏雄.OrCAD9.2和PowerPCB5.0实用教程[M].北京:国防工业出版社,2005:23-67.
    [21]李军,贾新章.PSpice子电路模型的创建[J].微电子学,2004,34(3):292-294.
    [22]王志刚等.现代电子线路[M].北京:北方交通大学出版社,2003:267-290.
    [23]修林成,童诗白,韩英铎,胡东成.采用数模混合电路实现前馈神经网络的一种方法[J].中国电
    机工程学报,1995,15(3):194-196.
    [24]刘高辉.CDMA系统中数模混合型信号处理的若干关键问题研究[D].西安:西安理工大学,2006:41-55.
    [25]丁玉美,高西全.数字信号处理[M].西安:西安电子科技大学出版社,2004:1-3,195-222.
    [26]刘治宇,林茂六,许洪光.一种基于混合滤波器组的高速高分辨率ADC系统研究[J].电子学报,2003,31(9):1404-1406.
    [27]刘高辉,余宁梅,高勇,牛兰奇.QPSK调制的WCDMA信号的一种数模混合型解扩方法[J].系统工程与电子技术,1997,26(7):1378-1380.
    [28]吴宁,吴建辉,张萌,戴忱.用于高速高分辨率ADC的CMOS全差分运算放大器的设计[J].电子器件,2005,28(1):150-153.
    [29]刘高辉,陈静谨,余宁梅,高勇等.CDMA扩频信号的数模混合型解扩方法[J].西安理工大学学报,2001,(4):326-330.
    [30]刘芳,高鹏飞,曹叶文.扩频通信系统中数字匹配滤波器的实现及其捕获性能分析[J].山东工业大学学报,2001,31(4):356-360.
    [31]李胜先,傅君眉,吴须大.星载高功率微波波导低通滤波器的精确设计[J].西安交通大学学报,2006,40(2):195-202.
    [32]郑晓燕,王江,仇玉林.低电压低功耗CMOS采样保持电路[J].电子器件,2005,29(2):318-321.
    [33]李琳,罗凯华.基于开关电容电路的模拟滤波器的设计[J].计测技术,2004,(11):35-36.
    [34]李莉.基于双二阶的CMOS集成SC滤波器的研究和设计[D].武汉:华中师范大学,2004:6-8.
    [35]刘保安.开关电容电路的分析方法[J].南京理工大学学报,1995,19(4):340-342.
    [36]杨媛.神经元MOS及其应用电路的研究[D].西安:西安理工大学,2004:3-8,72-78.
    [37]LIU Gaohui, YU Ningmei, GAO Yong, YANG Yua. Novel Neuron MOS Complex Matched Filter in WCDMA Communication Systems[J]. Chinese Journal Of Electron Devices,2007,30(2): 436-439.
    [38]张国燕,廖怀林,黄如等.适用于数模混合集成的SOIMOSFET的失真分析[J].电子学报,2002,30(2):232-235.
    [39]王少卿,徐其迎.数模混合电路中的“地跳动”问题研究[J].信息技术,2002,27(12):61-63.
    [40]陈庆方,戴昌培.数模混合集成电路的可测型设计[J].电子测量与仪器学报,2002,8(2):2-4.
    [41]鲁斌.数模混合集成电路设计技术研究[D].合肥:合肥工业大学,2006:11-19.
    [42]胡广书.数字信号处理——理论、算法与实践[M].北京:清华大学出版社,1995:17-29.
    [43]徐卫林,何怡刚,厉芸.数模混合信号的测试与仿真[J].微电子技术,2004,(22):80-82.
    [44]孙艳,吴建辉,陆生礼,袁文师.一种动态开关电容运算放大器共模负反馈电路[J].电路与系统学报,2004,9(1):55-57.
    [45]谭峥,高勇,杨媛.一种基于神经元MOS的直扩匹配滤波器新结构[J].电子器件,2005,28(2):362-365.
    [46]Yang Yuan, Yu Ningmei and Gao Yong. A Novel Matched Filter Structure with Neuron MOS Devices[J]. CHINESE JOURNAL OF SEMICONDUCTORS,2004,25(1):2-5.
    [47]郭南,洪福明.直接序列扩频数字匹配滤波器[J].电子科技大学学报,1996,25(5):454-458.
    [48]杨媛,高勇,余宁梅.用四端子器件实现的一种新型直接序列扩频匹配滤波器[J].通信学报,2004,25(4):168-173.
    [49]程佩青.数字信号处理教程[M].北京:清华大学出版社,2001:209-214.
    [50]赵雅兴.PSpice电子器件模型[M].北京:北京邮电大学出版社,2004:53-59.
    [51]朱义胜,董辉等.信号处理滤波器设计[M].北京:电子工业出版社,2004:147-159.
    [52]樊昌信,张甫翊等.通信原理[M].北京:国防工业出版社,2001:260-265.
    [53]毕查德·拉扎维著,陈贵灿,程军等译.模拟CMOS集成电路设计[M].西安:西安交通大学出版社,2003:209-225.
    [54]岳凌.数模混合系统仿真技术研究[D].北京:中国工程物理研究院,2005:4-9.
    [55]蔡锦福.运算放大器原理及应用[M].北京:科学出版社,2005:86-90.
    [56]Ning Mei Yu, Tadashi shibata and Tadahiro Ohmi. A Real-Time Center-of-Mass Tracker Circuit Implemented by Neuron MOS Technology [J]. IEEE Trans On circuits and Systems,1998,45 (4): 495-503.

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