基于时—空关系的时间间隔测量
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摘要
本文提出了一种新的短时间间隔测量方法,即利用时-空关系测量短时间间隔,提高了测量的分辨率。
电磁信号在真空中的传输速度是一个自然常数,它具有高速性和高稳定性。我们利用一定长度的传输线作为标准来量化被测时间间隔,自然具有了分辨率高和稳定度高的特点。将短时间间隔信号的开门信号用由传输线构成的差分延时单元进行延时,延时单元串连连接。然后在每个延时单元处设置重合检测电路,以检测被延时的开门信号和关门信号的重合信息。这样,时间量就被转换为了长度量。在某一延时单元处,可以检测到被延迟的开门信号将与关门信号重合,这一点的位置也就反映了被测时间间隔的值。文中给出了基于时-空关系时间间隔测量系统的结构原理图,建立了系统模型,分析了系统的误差来源及修正的方法。另外,文中详细分析了这种高分辨率与测量范围之间的矛盾,并提出了采用插入缓冲器放大信号,有源器件延时和计数器内插相结合的方法解决这个矛盾。
采用这种时-空关系原理,利用印制电路板上的微带线作为延时单元,我们制作了原型机。它工作在ECL电平下,使用边沿触发的D主从触发器作为重合检测电路,原型机的测量分辨率可以达到250皮秒。
结合CMOS工艺,我们设计了时间-数字转换芯片。该芯片使用亚毫米级的集成传输线作为延时单元,D触发器作为重合检测电路。并设计了缓冲器,延时锁相环,计数器来扩大测量范围。使用电流仿真软件对芯片进行仿真,分辨率达到37皮秒。
This paper presents a novel method for measuring time interval. The time-space relationship is used to improve the resolution and single-shot precision.
The speed of electromagnetic signal traveling in free space is a natural constant, which is of high value and high stability. Therefore, utilizing the transmission line of certain line as delay line to quantize the time interval features high resolution and high precision. The start signal of time interval is delayed by differential units composed of transmission line, which is connected in series. Then the coincidence detectors are placed at every delay unit to detect the coincidence of the delayed start signal and stop signal. In this way, the time is converted to the length. The point where the delayed start signal gets coincident with stop signal reflects the value of the measured time interval. In this paper, the block diagram of system is described, as well as the system model. The errors in the system are analyzed followed by the methods for their correction. Moreover, the contradiction between high resolution and measurement range is analyzed, and inserted buffers for regenerating signal, active delay line and counter are used to work it out.
Based on the time-space relationship, a prototype is realized using microstrips as delay line on the printed-circuit board and edge-triggered master-slaver D flip-flop as coincidence detector. The prototype works on the ECL level. The resolution of the prototype is 250ps.
With CMOS technology, a time-to-digital converter is designed, which uses integrated transmission line as delay line and D flip-flop as coincidence detector. In addition, the buffer, delay-locked loop and counter is designed to enlarge the measurement range. A simulation of the chip is performed with the software HSPICE. The resolution of 37ps is obtained.
电磁信号在真空中的传输速度是一个自然常数,它具有高速性和高稳定性。我们利用一定长度的传输线作为标准来量化被测时间间隔,自然具有了分辨率高和稳定度高的特点。将短时间间隔信号的开门信号用由传输线构成的差分延时单元进行延时,延时单元串连连接。然后在每个延时单元处设置重合检测电路,以检测被延时的开门信号和关门信号的重合信息。这样,时间量就被转换为了长度量。在某一延时单元处,可以检测到被延迟的开门信号将与关门信号重合,这一点的位置也就反映了被测时间间隔的值。文中给出了基于时-空关系时间间隔测量系统的结构原理图,建立了系统模型,分析了系统的误差来源及修正的方法。另外,文中详细分析了这种高分辨率与测量范围之间的矛盾,并提出了采用插入缓冲器放大信号,有源器件延时和计数器内插相结合的方法解决这个矛盾。
采用这种时-空关系原理,利用印制电路板上的微带线作为延时单元,我们制作了原型机。它工作在ECL电平下,使用边沿触发的D主从触发器作为重合检测电路,原型机的测量分辨率可以达到250皮秒。
结合CMOS工艺,我们设计了时间-数字转换芯片。该芯片使用亚毫米级的集成传输线作为延时单元,D触发器作为重合检测电路。并设计了缓冲器,延时锁相环,计数器来扩大测量范围。使用电流仿真软件对芯片进行仿真,分辨率达到37皮秒。
This paper presents a novel method for measuring time interval. The time-space relationship is used to improve the resolution and single-shot precision.
The speed of electromagnetic signal traveling in free space is a natural constant, which is of high value and high stability. Therefore, utilizing the transmission line of certain line as delay line to quantize the time interval features high resolution and high precision. The start signal of time interval is delayed by differential units composed of transmission line, which is connected in series. Then the coincidence detectors are placed at every delay unit to detect the coincidence of the delayed start signal and stop signal. In this way, the time is converted to the length. The point where the delayed start signal gets coincident with stop signal reflects the value of the measured time interval. In this paper, the block diagram of system is described, as well as the system model. The errors in the system are analyzed followed by the methods for their correction. Moreover, the contradiction between high resolution and measurement range is analyzed, and inserted buffers for regenerating signal, active delay line and counter are used to work it out.
Based on the time-space relationship, a prototype is realized using microstrips as delay line on the printed-circuit board and edge-triggered master-slaver D flip-flop as coincidence detector. The prototype works on the ECL level. The resolution of the prototype is 250ps.
With CMOS technology, a time-to-digital converter is designed, which uses integrated transmission line as delay line and D flip-flop as coincidence detector. In addition, the buffer, delay-locked loop and counter is designed to enlarge the measurement range. A simulation of the chip is performed with the software HSPICE. The resolution of 37ps is obtained.
引文
[1] http://www.time.ac.cn/time/application.htm
[2]周渭,偶晓娟,周晖等,《时频测控技术》, 2006年7月第一版,西安电子科技大学出版社,50-54页,69-70页
[3]梁昌洪,谢拥军,官伯然,《简明微波》,高等教育出版社,2006年7月第一版,pp. 14-15,
[4]沈文博,“高能物理实验中的高精度时间测量方法研究”,中国科技大学物理电子系博士论文,2004
[5]伏全海,“精密时间间隔测量方法及应用研究”,西安电子科技大学,硕士论文,2004
[6]偶晓娟,周渭,李琳等.“基于时-空关系的时间间隔与频率测量方法研究”,仪器仪表学报(增刊II),2006,27(6),1036-1038页
[7]樊战友,胡永辉,边玉敬.“嵌入式时间间隔计数器的研制”,时间频率学报,2005年6月,第28卷,第1期,1036-1038页
[8] Lin Li, Wei Zhou, et.al.“A Time-to-Digital Converter Based on Time-Space Relationship”, Proceedings of the 2007 IEEE International Frequency Control Symposium, pp.815-819, 2007
[9] Hui Zhou, Wei Zhou,“A Time and Frequency Measurement technique Based on Length Vernier”, Proceedings of the 2006 IEEE International Frequency Control Symposium, pp.267-272, 2006
[10] Jozef Kalisz.“Review of Methods for Time Interval Measurements with Picosecond resolution”.Metrologia 41 (2004). pp17-32
[11] J Kalisz, M Pawlowski, R Pelka.“Error Analysis and Design of the Nutt Time-Interval Digitizer with Picosecond Resolution”. J. Phys. E: Sci. Instrum. 20(1987) pp. 1330-1341
[12] Timo E. Rahkonen, Juha T. Kostamovaara,“The Use of Stabilized CMOS Delay Lines for the Digitaization of Short Time Intervals”, IEEE Journal of Solid-State Circuit, vol. 28, No. 8, Aug. 1993, pp. 887-893
[13] Jussi-Pekka Jansson, Antti Mantyniemi, Juha Kostamovaara,“A CMOS Time-to-Digital Converter with Better Than 10ps Single-Shot Precision”, IEEE Journal of Solid-State Circuit, vol. 41, No. 6, June 2006, pp. 1286-1296
[14] Piotr Dudek, Stanislaw Szczepanski, John V. Hatfield,“A High-Resolution CMOS Time-to-Digital Converter Utilizing a Vernier Delay Line”. IEEE Journal of Solid-State Circuit, Vol. 35, No. 2, Feb 2000, pp. 240-246
[15] D. K. Xie, Q. C. Zhang, G.. S. Qi, D. Y. Xu,“Cascading Delay Line TDC with 75ps Resolution and a Reduced Number of Delay Cells”. Review of Scientific Instruments, 76, 014701, (2005), pp. 240-246
[16] Ryszard Szplet, Jozef Kalisz, Rafal Szymanowski,“Interpolating Time Counter with 100ps Resolution on a Single FPGA Device”. IEEE Transaction on Instrumentation and Measurement, Vol. 49, No. 4, Aug. 2000, pp. 879-882
[17] Alina Deutsch,“Electrical characteristics of interconnections for high-performance systems”. Proceeding of the IEEE, Vol. 86, No. 2, Feb 1998, pp. 315-355
[18] Jens U. Horstmann, Hans W. Eichel, Robert L. Coates,“Metastability Behavior of CMOS ASIC Flip-Flops in Theory and Test”. IEEE Journal of Solid-State Circuit, Vol. 24, No. 1, Feb 1989, pp. 146-157
[19] Howard Johnson, Martin Graham,“High-Speed Digital Design– A handbook of Black Magic”, Publishing House of Electronic Industry, Jan. 2003,
[20] Behzad Razavi,“Design of Integrated Circuits for Optical Communications, 1st Edition”, Mc Graw Hill, Jan. 2005, pp 152-154.
[21] Sung-Mo Kang, Yusuf Leblebici,“CMOS Digital Integrated Circuits Analysis and Design, 3rd Edition”, Mc Graw Hill, Aug. 2004, pp
[22]“MECL 10H SPICE Kit for Berkeley SPICE”, REV 9, Motorola Inc., 1996, pp15
[23] Jozef Kalisz, Ryszard Szplet, Jerzy Pasierbinski, and Andrzej Poniecki,“Field-Programmable-Gate-Array-Based Time-to-Digital Converter with 200ps Resolution”. IEEE Transaction on Instrumentation and Measurement, Vol. 46, No. 1, Feb. 1997, pp. 51-54
[24] Jozef Kalisz, Ryszard Szplet, Ryszard Pelka, Andrzej Poniecki,“Single-Chip Interpolating Time Counter with 200ps Resolution and 43-s Range”. IEEE Transaction on Instrumentation and Measurement, Vol. 46, No. 4, Aug. 1997, pp. 851-856
[25]王幸之,钟爱琴,王雷等,《AT89系列单片机原理与接口技术》, 2004年5月第一版,北京航空航天大学出版社,43-59页
[26]偶晓娟,“皮秒级时频处理原理及电领域传输速度异常现象研究”,西安电子科技大学测试计量技术与仪器专业博士论文,2007
[27] Eric Bogatin著,李玉山,李丽平等译《信号完整性分析》,2006年1月,电子工业出版社
[28]郝跃,贾新章,吴玉广等,《微电子概论》, 2003年12月第一版,高等教育出版社,9-12页
[29] A. Mantyniemi, T. Rahkonen, J. Kostamovaara,“A nonlinearity-corrected CMOS time digitizer IC with 20ps single-shot precision”, Proc. IEEE Int. Symp. Circuitsand system, vol. 1, May 2002, pp. 513-516
[30] You-Jen Wang, Shao-Ku Kao, Shen-Iuan Liu,“All-Digital Delay-Locked Loop/Pulsewidth-Control Loop with Adjustable Duty Cycle”, IEEE Journal of Solid-State Circuit, vol. 41, No. 6, June 2006, pp. 1263-1273
[31] William R Blood,“MECL System Design Handbook 4th edition”, On Semiconductor Inc., Aug. 2000
[2]周渭,偶晓娟,周晖等,《时频测控技术》, 2006年7月第一版,西安电子科技大学出版社,50-54页,69-70页
[3]梁昌洪,谢拥军,官伯然,《简明微波》,高等教育出版社,2006年7月第一版,pp. 14-15,
[4]沈文博,“高能物理实验中的高精度时间测量方法研究”,中国科技大学物理电子系博士论文,2004
[5]伏全海,“精密时间间隔测量方法及应用研究”,西安电子科技大学,硕士论文,2004
[6]偶晓娟,周渭,李琳等.“基于时-空关系的时间间隔与频率测量方法研究”,仪器仪表学报(增刊II),2006,27(6),1036-1038页
[7]樊战友,胡永辉,边玉敬.“嵌入式时间间隔计数器的研制”,时间频率学报,2005年6月,第28卷,第1期,1036-1038页
[8] Lin Li, Wei Zhou, et.al.“A Time-to-Digital Converter Based on Time-Space Relationship”, Proceedings of the 2007 IEEE International Frequency Control Symposium, pp.815-819, 2007
[9] Hui Zhou, Wei Zhou,“A Time and Frequency Measurement technique Based on Length Vernier”, Proceedings of the 2006 IEEE International Frequency Control Symposium, pp.267-272, 2006
[10] Jozef Kalisz.“Review of Methods for Time Interval Measurements with Picosecond resolution”.Metrologia 41 (2004). pp17-32
[11] J Kalisz, M Pawlowski, R Pelka.“Error Analysis and Design of the Nutt Time-Interval Digitizer with Picosecond Resolution”. J. Phys. E: Sci. Instrum. 20(1987) pp. 1330-1341
[12] Timo E. Rahkonen, Juha T. Kostamovaara,“The Use of Stabilized CMOS Delay Lines for the Digitaization of Short Time Intervals”, IEEE Journal of Solid-State Circuit, vol. 28, No. 8, Aug. 1993, pp. 887-893
[13] Jussi-Pekka Jansson, Antti Mantyniemi, Juha Kostamovaara,“A CMOS Time-to-Digital Converter with Better Than 10ps Single-Shot Precision”, IEEE Journal of Solid-State Circuit, vol. 41, No. 6, June 2006, pp. 1286-1296
[14] Piotr Dudek, Stanislaw Szczepanski, John V. Hatfield,“A High-Resolution CMOS Time-to-Digital Converter Utilizing a Vernier Delay Line”. IEEE Journal of Solid-State Circuit, Vol. 35, No. 2, Feb 2000, pp. 240-246
[15] D. K. Xie, Q. C. Zhang, G.. S. Qi, D. Y. Xu,“Cascading Delay Line TDC with 75ps Resolution and a Reduced Number of Delay Cells”. Review of Scientific Instruments, 76, 014701, (2005), pp. 240-246
[16] Ryszard Szplet, Jozef Kalisz, Rafal Szymanowski,“Interpolating Time Counter with 100ps Resolution on a Single FPGA Device”. IEEE Transaction on Instrumentation and Measurement, Vol. 49, No. 4, Aug. 2000, pp. 879-882
[17] Alina Deutsch,“Electrical characteristics of interconnections for high-performance systems”. Proceeding of the IEEE, Vol. 86, No. 2, Feb 1998, pp. 315-355
[18] Jens U. Horstmann, Hans W. Eichel, Robert L. Coates,“Metastability Behavior of CMOS ASIC Flip-Flops in Theory and Test”. IEEE Journal of Solid-State Circuit, Vol. 24, No. 1, Feb 1989, pp. 146-157
[19] Howard Johnson, Martin Graham,“High-Speed Digital Design– A handbook of Black Magic”, Publishing House of Electronic Industry, Jan. 2003,
[20] Behzad Razavi,“Design of Integrated Circuits for Optical Communications, 1st Edition”, Mc Graw Hill, Jan. 2005, pp 152-154.
[21] Sung-Mo Kang, Yusuf Leblebici,“CMOS Digital Integrated Circuits Analysis and Design, 3rd Edition”, Mc Graw Hill, Aug. 2004, pp
[22]“MECL 10H SPICE Kit for Berkeley SPICE”, REV 9, Motorola Inc., 1996, pp15
[23] Jozef Kalisz, Ryszard Szplet, Jerzy Pasierbinski, and Andrzej Poniecki,“Field-Programmable-Gate-Array-Based Time-to-Digital Converter with 200ps Resolution”. IEEE Transaction on Instrumentation and Measurement, Vol. 46, No. 1, Feb. 1997, pp. 51-54
[24] Jozef Kalisz, Ryszard Szplet, Ryszard Pelka, Andrzej Poniecki,“Single-Chip Interpolating Time Counter with 200ps Resolution and 43-s Range”. IEEE Transaction on Instrumentation and Measurement, Vol. 46, No. 4, Aug. 1997, pp. 851-856
[25]王幸之,钟爱琴,王雷等,《AT89系列单片机原理与接口技术》, 2004年5月第一版,北京航空航天大学出版社,43-59页
[26]偶晓娟,“皮秒级时频处理原理及电领域传输速度异常现象研究”,西安电子科技大学测试计量技术与仪器专业博士论文,2007
[27] Eric Bogatin著,李玉山,李丽平等译《信号完整性分析》,2006年1月,电子工业出版社
[28]郝跃,贾新章,吴玉广等,《微电子概论》, 2003年12月第一版,高等教育出版社,9-12页
[29] A. Mantyniemi, T. Rahkonen, J. Kostamovaara,“A nonlinearity-corrected CMOS time digitizer IC with 20ps single-shot precision”, Proc. IEEE Int. Symp. Circuitsand system, vol. 1, May 2002, pp. 513-516
[30] You-Jen Wang, Shao-Ku Kao, Shen-Iuan Liu,“All-Digital Delay-Locked Loop/Pulsewidth-Control Loop with Adjustable Duty Cycle”, IEEE Journal of Solid-State Circuit, vol. 41, No. 6, June 2006, pp. 1263-1273
[31] William R Blood,“MECL System Design Handbook 4th edition”, On Semiconductor Inc., Aug. 2000