面向可重构片上系统的过程级软硬件划分算法研究
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摘要
可重构片上系统的出现,带来了嵌入式系统的巨大飞跃,可重构系统的灵活性、高性能和高可靠性使得,其得到广泛应用。既能够提供硬件的高性能,又具有可编程性,方便用户的各种需求,特别是在运行过程中功能要求动态变化的应用,因此该系统在航天领域、加密系统、嵌入式系统教学研究方面有着广泛的应用前景。
但由于可重构片上系统的灵活性带来了,设计的复杂度.特别是部分动态可重构技术的出现,使得可重构片上系统的设计能力有所不足,作为软硬件协同设计关键步骤的软硬件划分尤为突出,如何针对可重构片上系统提出一种行之有效的划分方法是一个非常重要的问题。本文集中对面向可重构片上系统软硬件协同设计中的软硬件划分进行研究,对系统的描述,粒度选择,和软硬件划分算法进行了探索和研究,主要完成了以下工作：
首先,提出了一种新的静态软硬件划分算法：基于过程级(函数)的粒子群模拟退火混合算法。基本粒子群算法实现简单,运算速度快,有时会陷入局部最优,粒子群算法从个体极值和邻域极值获得更新信息,信息共享机制是单向的,信息的目的性很强有助于提高收敛速度,但是也增加了陷入局部最优的概率。结合其他搜索算法可提高搜索效率。结合模拟退火算法跳出局部最优的能力,本文构造出基于过程级(函数)的混合算法,将两者有机的结合了起来。实验表明,本文所提出的算法能在软硬件划分中的有效性和可行性,并且算法运行稳定。
其次,提出了一种动态软硬件划分算法：考虑带权重任务节点深度的动态软硬件划分,该算法充分考虑了在DAG图中每个节点对后续节点的影响,考虑节点的执行时间与通信时间,依据节点之间的依赖关系进行深度优先搜索,并将该因素纳入目标函数,从而达到有效提高系统性能的目的.
最后,设计了两个个简单原型系统。根据现有工具和可重构片上系统资源,设计了运行划分算法的原型系统,其中包括静态划分和动态划分两种原型系统。从整个设计流程的角度,来验证算法的可行性和有效性。
The reconfigurable System on Chip's (RSoC) appearance brought a big jump in embedded systems. Reconfigurable system's flexibility, high performance and high reliability make it widely used. It not only provides high-performance hardware, but also has programmable. RSoC can meet user's needs, especially in, the requirement is dynamic change. So that this system is widely used in the aerospace field, encryption system, research and education in embedded system.
However, design becomes complex because of the flexibility of reconfigurable system on chip. Especially in while the dynamic reconfiguration technology emerges, which make the reconfigurable system on chip's design capability is inadequate. The most critical step in hardware-software co-design is the HW/SW partitioning. It is a important issue that find a effective partitioning method. This paper focuses on HW/SW partitioning algorithm of hardware-software co-design on RSoC. In this paper the function specifications, granularity level, and hardware-software partitioning algorithm are researched, this thesis does the following work:
First of all, a new static HW/SW partitioning algorithm is represented:Based on the process level (function) of the hybrid optimal algorithm, which is constructed by merging particle swarm algorithm with simulated annealing algorithm. The particle swarm algorithm is simple, fast speed, but sometimes fall into local optimum. During very iteration, each particle is update by following two "best" values. The first one is called local best. Aonther is called global best. The mechanism of sharing the information is unidirectional. The information is purposeful which not only can speed up the convergence rate, but also increases the probability of falling into the local optimum. Combined with other search algorithm can improve the search efficiency. Because the simulated annealing algorithm can be out of the local optimum, in this paper a hybrid optimal algorithm is constructed based on the process level (function). Results of experiments show that this optimal algorithm is effective, feasible and stable in the HW/SW portioning.
Secondly, a dynamic HW/SW partitioning algorithm is represented:a dynamic HW/SW partitioning algorithm consider the depth of the task node. This algorithm is fully considered in each node in the DAG graph the impact on the subsequent nodes. To consider nodes'execution time and communication time, based on the dependence between the nodes, the depth first search is executed. And that factors into the objective function, so as to achieve the purpose of effectively improving system performance.
Finally, two simple prototype systems are designed. According to existing tools and reconfigurable on-chip system resources, the partitioning algorithm is run in a prototype system:including two prototype systems of static and dynamic. The feasibility and effectiveness are verified on the perspective of the entire design process.
但由于可重构片上系统的灵活性带来了,设计的复杂度.特别是部分动态可重构技术的出现,使得可重构片上系统的设计能力有所不足,作为软硬件协同设计关键步骤的软硬件划分尤为突出,如何针对可重构片上系统提出一种行之有效的划分方法是一个非常重要的问题。本文集中对面向可重构片上系统软硬件协同设计中的软硬件划分进行研究,对系统的描述,粒度选择,和软硬件划分算法进行了探索和研究,主要完成了以下工作：
首先,提出了一种新的静态软硬件划分算法：基于过程级(函数)的粒子群模拟退火混合算法。基本粒子群算法实现简单,运算速度快,有时会陷入局部最优,粒子群算法从个体极值和邻域极值获得更新信息,信息共享机制是单向的,信息的目的性很强有助于提高收敛速度,但是也增加了陷入局部最优的概率。结合其他搜索算法可提高搜索效率。结合模拟退火算法跳出局部最优的能力,本文构造出基于过程级(函数)的混合算法,将两者有机的结合了起来。实验表明,本文所提出的算法能在软硬件划分中的有效性和可行性,并且算法运行稳定。
其次,提出了一种动态软硬件划分算法：考虑带权重任务节点深度的动态软硬件划分,该算法充分考虑了在DAG图中每个节点对后续节点的影响,考虑节点的执行时间与通信时间,依据节点之间的依赖关系进行深度优先搜索,并将该因素纳入目标函数,从而达到有效提高系统性能的目的.
最后,设计了两个个简单原型系统。根据现有工具和可重构片上系统资源,设计了运行划分算法的原型系统,其中包括静态划分和动态划分两种原型系统。从整个设计流程的角度,来验证算法的可行性和有效性。
The reconfigurable System on Chip's (RSoC) appearance brought a big jump in embedded systems. Reconfigurable system's flexibility, high performance and high reliability make it widely used. It not only provides high-performance hardware, but also has programmable. RSoC can meet user's needs, especially in, the requirement is dynamic change. So that this system is widely used in the aerospace field, encryption system, research and education in embedded system.
However, design becomes complex because of the flexibility of reconfigurable system on chip. Especially in while the dynamic reconfiguration technology emerges, which make the reconfigurable system on chip's design capability is inadequate. The most critical step in hardware-software co-design is the HW/SW partitioning. It is a important issue that find a effective partitioning method. This paper focuses on HW/SW partitioning algorithm of hardware-software co-design on RSoC. In this paper the function specifications, granularity level, and hardware-software partitioning algorithm are researched, this thesis does the following work:
First of all, a new static HW/SW partitioning algorithm is represented:Based on the process level (function) of the hybrid optimal algorithm, which is constructed by merging particle swarm algorithm with simulated annealing algorithm. The particle swarm algorithm is simple, fast speed, but sometimes fall into local optimum. During very iteration, each particle is update by following two "best" values. The first one is called local best. Aonther is called global best. The mechanism of sharing the information is unidirectional. The information is purposeful which not only can speed up the convergence rate, but also increases the probability of falling into the local optimum. Combined with other search algorithm can improve the search efficiency. Because the simulated annealing algorithm can be out of the local optimum, in this paper a hybrid optimal algorithm is constructed based on the process level (function). Results of experiments show that this optimal algorithm is effective, feasible and stable in the HW/SW portioning.
Secondly, a dynamic HW/SW partitioning algorithm is represented:a dynamic HW/SW partitioning algorithm consider the depth of the task node. This algorithm is fully considered in each node in the DAG graph the impact on the subsequent nodes. To consider nodes'execution time and communication time, based on the dependence between the nodes, the depth first search is executed. And that factors into the objective function, so as to achieve the purpose of effectively improving system performance.
Finally, two simple prototype systems are designed. According to existing tools and reconfigurable on-chip system resources, the partitioning algorithm is run in a prototype system:including two prototype systems of static and dynamic. The feasibility and effectiveness are verified on the perspective of the entire design process.
引文
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[2]熊光泽,詹瑾瑜.嵌入式系统软/硬件协同设计技术综述.计算机应用,2006,26(4)：757-760
[3]Gordon E Moore. Cramming more components onto integrated circuits. IEEE, 1998,86(1):82-84
[4]Jason Cong, Joseph R Shinnerl, Min Xie, et al. Largescale circuit placement. ACMTrans,2005,10(2):389-430.
[5]Qinghai Liu, Malgorzata Marek-Sadowska. A study of netlist structure and placement efficiency. In ISPD'04:Proceedings of the 2004 international symposium on Physical design. New York,2004,198-203.
[6]Andre DeHon. Very large scale spatial computing. In UMC'02:Proceedings of the Third International Conference on Unconventional Models of Computation. London,2002,27-36
[7]Giovanni D M, K Gupta. Hardware/Software Co-Design. In:Proc of IEEE. Landon,1997,23-28
[8]R Ernst. Codesign of Embedded Systems:Status and Trends. IEEE Design&Test of Computers,1998,46(15):24-34
[9]Arunachalam V, Sapra, S, Prakash Rainac J, et al. Hardware/Software partitioning algorithm for embedded systems with repeated functionalities. In: IEEE Region 10 Conference. Hyderabad,2008:1-6
[10]Micheli G D,Gupta R K. Hardware/Software Co-Design. Proc of IEEE,1997, 85(3):349-365
[11]Harel D, Namad A. The STATEMATE Semantics of State charts. ACM. Transactions on Software Engineering and Methodology,1996,5(4):408-415
[12]Marco S, Luciano L, Alberto S V. Formal Models for Embedded System Design. IEEE Design&Test of Computers,2000,17(2):2-15
[13]J L Peterson. Petri Net Theory and the modeling of systems. New Jersey: Englewood cliff,1981,22-33
[14]黄源,钟艳如,陈沼均.基于时间Petri网的嵌入式系统软硬件划分方法.微计算机信息,2008,28(4)：58-67
[15]Amin F, Mehdi K, Sied M F. HW/SW Partitioning Using Discrete Particle Swarm. In:Proc of the 17th Acre Great Lakes symposium. San Francisco,2007,359-364
[16]Rolf E, Jorg H, Thomas B. Hardware-Software Cosynthesis for Microcontrollers. IEEE Design&Test of Computers,1993,10(4):64-75
[17]Pai C, Ross B, Ortega G B. The Chinook Hardware/Software CoSynthesis System. In:Proc of International Symposium on System Synthesis. France:IEEE Computer Society Press,1995,22-27
[18]Madsen J, Grode J, Knudsen P v, et al. LYCOS:the Lyngby Co-Synthesis System. Design Automation for Embedded Systems,1997,2(1):1-43
[19]Frank V, Daniel D G. Closeness metrics for system-level functional partitioning. In:Proc of the Conference on European Design Automation. Brighton,1995, 328-333
[20]Xun X, Edna B, Wolfgang R. A Method for partitioning UNITY language in hardware and software. In:Proc of European Conference on Design Automation (EURO DAC). France,1994,220-225
[21]Jorg H, Rolf E. The Interplay of Run-Time Estimation and Granularity in Hw/Sw Partitioning. In:Proc of International Workshop on Hardware/Software Codesign. Pittsburgh.1996,52-58
[22]吴强,王云峰,边计年等.软硬件划分中基于一种新的层次化控制数据流 图的粒度变换.计算机辅助设计与图形学报,2005,17(3)：14-20
[23]T J Callahan, J Wawrzynek. Instruction level parallelism for reconfigurable computing. In:Proc 8th Intl Workshop on Field-Programmable Logic and Applications.1998,1-10
[24]J R Hauser and J. Wawrzynek.Garp:A MIPS processor with a reconfigurable coprocessor. In:Proc FCCM'97.1997,25-34
[25]J Madsen, J Gorde, P V Knudsen, et al. LYCOS:The Lyngby co-synthesis system. Design Automation of embedded Systems,1997,2(2):195-236
[26]M Ditzel. Power-aware architecting for data-dominated applications:[PhD thesis]. Delft University of Technology,2004,70-80
[27]N N Binh, M Imai, A Shiomi, et al. A hardware/software partitioning algorithm for designing pipelined ASIPs with least gate counts. In:Proceedings of 33 Design Automation Conference. LasVegas,1996,527-532
[28]J Henkel, R Ernst. An approach to automated hardware/software partitioning using a flexible granularity that is driven by high-level estimation techniques. IEEE Transactions on Very Large Scale Integration (VLSI) Systems,2001,9(2): 273-289
[29]Z A Mann. Partitioning algorithms for Hardware/Software Codesign:[PhD thesis]. Budapest University of Technology and Economics, Hungary,2004, 22-25
[30]P Eles, Z Peng, K Kuchcinski, et al. System level hardware/software partitioning besed on simulated annealing and tabu search. Design automation for embedded systems,1997,2(1):5-32
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