基于DDS的DPSK调制解调软件无线电实现
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摘要
软件无线电(Software Defined Radio,SDR)技术在现代信息传输中占有越来越重要的地位。无线电通信、电视、雷达、遥控遥测等,都需要利用无线电技术传输各种不同的信息,而在这些信息的传递过程中,都要用到调制和解调这些关键技术,从最早的模拟调幅调频技术的日臻完善,到现在的数字调制技术广泛运用,以及调制解调器的软件无线电实现,可使得信息的传输更为有效和可靠。
论文首先介绍了进行数字通信所必须的模数转换器(ADC)和将数字信号变为模拟信号的数模转换器(DAC)。然后介绍了现场可编程门阵列(FPGA)的特点和设计流程及软处理器核系统Microblaze。论文还讨论了直接数字合成器(DDS)的FPGA实现,及在DDS基础上利用FPGA来实现差分相移键控(DPSK)调制器和解调器的设计方法。在设计中选用了Xilinx公司含有大量逻辑资源的现场可编程门阵列Virtex-5系列器件,在此集成环境下调用库存功能模块或直接用VHDL语言编程来实现设计要求。在DPSK解调模块中还采用新推出的Microblaze软处理器核系统来进行设计。最后对本文进行了总结和展望。
Software defined radio (SDR) technique occupies the more and more important position in current information transmission. Many systems need utilize this technique to transmit all kinds of information, for example, wireless communication, TV, radar, telecontrol and telemetry, etc. It will use some key technique of modulation and demodulation during the information transmission process. From the continous improvement of previous analog AM and FM technique to expanded application of current digital modulation, all of those techniques will make information transmission more effective and reliable.
Firstly this paper introduced the analog to digital converter (ADC) and digital to analog converter (DAC) which were necessary for the digital communication. Then it stated the features and design of field programme gate array (FPGA) and system of soft processor core-Microblaze. And the paper also investigated the FPGA implement of direct digital synthesizer (DDS) and the design method of the difference phase shift keying (DPSK) modulation and demodulation based on the FPGA. The Xilinx FPGA component-Virtex 5 with abundant logic sources was selected. Under this integrated surrounding, the inventory function modules or program with VHDL language was used to fulfill the design demand. Furthermore, the DPSK demodulation has been designed with the new system of soft processor core-Microblaze. The summary and development for this paper were shown at last.
论文首先介绍了进行数字通信所必须的模数转换器(ADC)和将数字信号变为模拟信号的数模转换器(DAC)。然后介绍了现场可编程门阵列(FPGA)的特点和设计流程及软处理器核系统Microblaze。论文还讨论了直接数字合成器(DDS)的FPGA实现,及在DDS基础上利用FPGA来实现差分相移键控(DPSK)调制器和解调器的设计方法。在设计中选用了Xilinx公司含有大量逻辑资源的现场可编程门阵列Virtex-5系列器件,在此集成环境下调用库存功能模块或直接用VHDL语言编程来实现设计要求。在DPSK解调模块中还采用新推出的Microblaze软处理器核系统来进行设计。最后对本文进行了总结和展望。
Software defined radio (SDR) technique occupies the more and more important position in current information transmission. Many systems need utilize this technique to transmit all kinds of information, for example, wireless communication, TV, radar, telecontrol and telemetry, etc. It will use some key technique of modulation and demodulation during the information transmission process. From the continous improvement of previous analog AM and FM technique to expanded application of current digital modulation, all of those techniques will make information transmission more effective and reliable.
Firstly this paper introduced the analog to digital converter (ADC) and digital to analog converter (DAC) which were necessary for the digital communication. Then it stated the features and design of field programme gate array (FPGA) and system of soft processor core-Microblaze. And the paper also investigated the FPGA implement of direct digital synthesizer (DDS) and the design method of the difference phase shift keying (DPSK) modulation and demodulation based on the FPGA. The Xilinx FPGA component-Virtex 5 with abundant logic sources was selected. Under this integrated surrounding, the inventory function modules or program with VHDL language was used to fulfill the design demand. Furthermore, the DPSK demodulation has been designed with the new system of soft processor core-Microblaze. The summary and development for this paper were shown at last.
引文
[1]John G.Proakis著,张力军,张宗橙,郑宝玉等译,数字通信[M],北京,电子工业出版社,2005年第4版,第169-268页;
[2]王金龙,沈良,任国春,蔡跃明,陈瑾,吴启晖,无线通信系统的DSP实现[M],北京,人民邮电出版社,2002年4月第1版,第48-110页;
[3]张厥盛,郑继禹,万心平,锁相技术[M],西安西安电子科技大学出版社,1994;
[4]刘凌,胡永生,数字信号处理的FPGA实现[M],北京,清华大学出版社,2001年5月;
[5]王世一,数字信号处理[M],北京,北京理工大学出版社,1997年1月;
[6]EDA先锋工作室,薛小刚,葛毅敏,Xilinx ISE9.X FPGA/CPLD设计指南[M],北京,人民邮电出版社,2007年8月第1版,共376页;
[7]Stefan Sjoholm,Lennart Lindh著,边计年,薛宏熙译,用VHDL设计电子线路[M],北京,清华大学出版社,2000年8月第一版,共393页;
[8]齐洪喜,陆颖,VHDL电路设计实用教程[M],北京,清华大学出版社,2004年6月第1版,共254页;
[9]陈小荣,基于DDS的正弦信号发生器设计,仪器仪表用户[J],2006年第13卷第4期,第53-54页;
[10]汤家华,王道德,基于FPGA设计的采用DDS技术的任意波形发生器[J],电子测量技术,2007年4月第30卷第4期,第129-131页;
[11]贾达、马芙蓉、汪霞,基于FPGA的ASK PSK FSK信号的设计和实现[J],兰州石化技术学院学报,2007年6月第7卷第2期,第20-22页:
[12]朱路,基于FPGA设计8-PSK调制[J],华东交通大学学报,2005年4月第22卷第2期,第60-63页;
[13]张佩宗,利用FPGA实现通用解调器[J],无线电通信技术,2001年第27卷第6期,第49-50页;
[14]柯宏发,孙晓东,周广涛,葛海龙,一种基于FPGA的多功能通用解调器[J],电视技术,2003年第3期,研究与开发,第25-28页;
[15]黄丛生,齐海兵,利用DDS技术的通用调制器设计及FPGA实现[J],现代电子技术,2007年第10期第249卷,第103-105页;
[16]智少雷,侯俊钦,基于FPGA的多功能正弦信号发生器[J],淮北煤炭师范学院学报,2006年9月第27期第3卷,第34-39页;
[17]高明华,基于DDS原理实现多进制相移键控[J],科技广场,2005年2月,第106-107页;
[18]艾乐,卜祥元,FPGA实现MPSK解调[J],电子通信,2005年第4期,第32-37页;
[19]王炜,赵可萍,郑易,基于FPGA的调制信号电路设计[J],微计算机信息(嵌入式与SOC),2007年第23卷第2-2期,第206-207页;
[20]钟辉捷,雷航,基于Virtex4的SoPC系统设计,航空计算技术[J],2007年5月第37卷第3期,第83-85页;
[21]Xilinx,MicroBlaze Processor Referencr Guide,EDK(V8.1),December.9.2006;
[22]Xilinx,Embedded System Tools Guide,UG111(V1.4),January.30.2004;
[23]Xilinx Platform Studio User Guide,UG113(V1.0),January.30.2004;
[24]Sandeep Mukthavaram,Design and FPGA Implementation of an Adaptive Demodulator[D],Hyderabad,India,Osmania University,1997;
[25]Mehmet Rasit Yuce,Wentai Liu,John Damiano,Bhaskar Bharath,Paul D.Franzon,and Numan S.Dogan,SOI CMOS Implementation of a Multirate PSK Demodulator for Space Communications[N],IEEE Transactions On Circuits And Systems-Ⅰ:Regular Papers,VOL.54,NO.2,February 2007,page420-431;
[26]John,M.Gevargiz,Performance Analysis of an all Digital Demodulator[N],IEEE,1993,page670-1672;
[27]Chris Dick,Fred,Harric,Michael Rice,Synchronization in Software Radios-Carrier and Timing Recovery Using FPGA[N],IEEE,2000,page195-204;
[28]Gary Mitchell,Thierry Guichou,Digital Costas Loop Design for CoherentMicrosatellite Transponders[N],IEEE,March 2002,pagel 197-1209;
[29]M.R.Simon,False Lock Performance of I-Q Costas Loops for Pulse-Shaped Binary Phase Shift Keying[J],Communications Systems and Research,November 15,1997;
[30]H.S.Jamadagni,B.S.Sonde,A.V.Shah,All-Digital Synchronizers for DPSK Demodulators[J],University of Neuchatel,November 18,1996;
[31]U.Meyer-Base,Coherent Demodulation with FPGAs[J],Lecture Notes in Computer Science 1142,page166-175,1996;
[32]Yair Linn,Nir Peleg,A Family of Self-Normalizing Carrier Lock Detectors and ES=N.Estimators for M-PSK and Other Phase Modulation Schemes[N],IEEE Transactions On Wireless Communications,VOL.3,NO.5,September 2004,Page 1659-1668;
[33]Yair Linn, A Self-Normalizing Symbol Synchronization Lock Detector for QPSK and BPSK[N], IEEE Transactions On Wireless Communications, VOL.5, NO. 2, February 2006, Page347-353;
[34]S. Honary, N. Pandya,G. Markarian and B. Honary, Migration to capacity approaching codes for digital video broadcasting[N], IEEE Proc-Commun. , Vol. 152, No. 6, December 2005, Page1103-1107;
[35]David Ramirez Moran, Javier Gismero Menoyo, and Jose Luis Jimenez Martin, Digital Frequency Synthesizer Based on Two Coprime Moduli DDS[N], IEEE Transactions On Circuits and Systems—II: Express Briefs, VOL. 53, NO. 12, December 2006, Page1388-1392;
[36]Trini Sansaloni, Asun Perez-Pascual, Vicente Torres, Vicen. Almenar, Jose F.Toledo, and Javier Vails, FFT Spectrum Analyzer Project for Teaching Digital Signal Processing With FPGA Devices[N], IEEE Transactions On Education, VOL. 50, NO. 3, Augest 2007, Page229-235;
[2]王金龙,沈良,任国春,蔡跃明,陈瑾,吴启晖,无线通信系统的DSP实现[M],北京,人民邮电出版社,2002年4月第1版,第48-110页;
[3]张厥盛,郑继禹,万心平,锁相技术[M],西安西安电子科技大学出版社,1994;
[4]刘凌,胡永生,数字信号处理的FPGA实现[M],北京,清华大学出版社,2001年5月;
[5]王世一,数字信号处理[M],北京,北京理工大学出版社,1997年1月;
[6]EDA先锋工作室,薛小刚,葛毅敏,Xilinx ISE9.X FPGA/CPLD设计指南[M],北京,人民邮电出版社,2007年8月第1版,共376页;
[7]Stefan Sjoholm,Lennart Lindh著,边计年,薛宏熙译,用VHDL设计电子线路[M],北京,清华大学出版社,2000年8月第一版,共393页;
[8]齐洪喜,陆颖,VHDL电路设计实用教程[M],北京,清华大学出版社,2004年6月第1版,共254页;
[9]陈小荣,基于DDS的正弦信号发生器设计,仪器仪表用户[J],2006年第13卷第4期,第53-54页;
[10]汤家华,王道德,基于FPGA设计的采用DDS技术的任意波形发生器[J],电子测量技术,2007年4月第30卷第4期,第129-131页;
[11]贾达、马芙蓉、汪霞,基于FPGA的ASK PSK FSK信号的设计和实现[J],兰州石化技术学院学报,2007年6月第7卷第2期,第20-22页:
[12]朱路,基于FPGA设计8-PSK调制[J],华东交通大学学报,2005年4月第22卷第2期,第60-63页;
[13]张佩宗,利用FPGA实现通用解调器[J],无线电通信技术,2001年第27卷第6期,第49-50页;
[14]柯宏发,孙晓东,周广涛,葛海龙,一种基于FPGA的多功能通用解调器[J],电视技术,2003年第3期,研究与开发,第25-28页;
[15]黄丛生,齐海兵,利用DDS技术的通用调制器设计及FPGA实现[J],现代电子技术,2007年第10期第249卷,第103-105页;
[16]智少雷,侯俊钦,基于FPGA的多功能正弦信号发生器[J],淮北煤炭师范学院学报,2006年9月第27期第3卷,第34-39页;
[17]高明华,基于DDS原理实现多进制相移键控[J],科技广场,2005年2月,第106-107页;
[18]艾乐,卜祥元,FPGA实现MPSK解调[J],电子通信,2005年第4期,第32-37页;
[19]王炜,赵可萍,郑易,基于FPGA的调制信号电路设计[J],微计算机信息(嵌入式与SOC),2007年第23卷第2-2期,第206-207页;
[20]钟辉捷,雷航,基于Virtex4的SoPC系统设计,航空计算技术[J],2007年5月第37卷第3期,第83-85页;
[21]Xilinx,MicroBlaze Processor Referencr Guide,EDK(V8.1),December.9.2006;
[22]Xilinx,Embedded System Tools Guide,UG111(V1.4),January.30.2004;
[23]Xilinx Platform Studio User Guide,UG113(V1.0),January.30.2004;
[24]Sandeep Mukthavaram,Design and FPGA Implementation of an Adaptive Demodulator[D],Hyderabad,India,Osmania University,1997;
[25]Mehmet Rasit Yuce,Wentai Liu,John Damiano,Bhaskar Bharath,Paul D.Franzon,and Numan S.Dogan,SOI CMOS Implementation of a Multirate PSK Demodulator for Space Communications[N],IEEE Transactions On Circuits And Systems-Ⅰ:Regular Papers,VOL.54,NO.2,February 2007,page420-431;
[26]John,M.Gevargiz,Performance Analysis of an all Digital Demodulator[N],IEEE,1993,page670-1672;
[27]Chris Dick,Fred,Harric,Michael Rice,Synchronization in Software Radios-Carrier and Timing Recovery Using FPGA[N],IEEE,2000,page195-204;
[28]Gary Mitchell,Thierry Guichou,Digital Costas Loop Design for CoherentMicrosatellite Transponders[N],IEEE,March 2002,pagel 197-1209;
[29]M.R.Simon,False Lock Performance of I-Q Costas Loops for Pulse-Shaped Binary Phase Shift Keying[J],Communications Systems and Research,November 15,1997;
[30]H.S.Jamadagni,B.S.Sonde,A.V.Shah,All-Digital Synchronizers for DPSK Demodulators[J],University of Neuchatel,November 18,1996;
[31]U.Meyer-Base,Coherent Demodulation with FPGAs[J],Lecture Notes in Computer Science 1142,page166-175,1996;
[32]Yair Linn,Nir Peleg,A Family of Self-Normalizing Carrier Lock Detectors and ES=N.Estimators for M-PSK and Other Phase Modulation Schemes[N],IEEE Transactions On Wireless Communications,VOL.3,NO.5,September 2004,Page 1659-1668;
[33]Yair Linn, A Self-Normalizing Symbol Synchronization Lock Detector for QPSK and BPSK[N], IEEE Transactions On Wireless Communications, VOL.5, NO. 2, February 2006, Page347-353;
[34]S. Honary, N. Pandya,G. Markarian and B. Honary, Migration to capacity approaching codes for digital video broadcasting[N], IEEE Proc-Commun. , Vol. 152, No. 6, December 2005, Page1103-1107;
[35]David Ramirez Moran, Javier Gismero Menoyo, and Jose Luis Jimenez Martin, Digital Frequency Synthesizer Based on Two Coprime Moduli DDS[N], IEEE Transactions On Circuits and Systems—II: Express Briefs, VOL. 53, NO. 12, December 2006, Page1388-1392;
[36]Trini Sansaloni, Asun Perez-Pascual, Vicente Torres, Vicen. Almenar, Jose F.Toledo, and Javier Vails, FFT Spectrum Analyzer Project for Teaching Digital Signal Processing With FPGA Devices[N], IEEE Transactions On Education, VOL. 50, NO. 3, Augest 2007, Page229-235;