OBS突发收发卡的设计与实现
|
摘要
光突发交换(Optical Burst Switch–OBS)可以充分利用DWDM光网络的带宽资源,适用于突发业务,是一种有效的IP over WDM解决方案。光突发收发技术是OBS系统中边缘节点的关键技术。本文着眼于OBS边缘节点突发收发技术的研究,提出了一种基于FPGA的OBS边缘节点突发收发卡的设计方案,利用空间过采样技术来实现光路数据的突发接收,通过控制激光器驱动电路的工作状态来实现光路数据的突发发送。设计并实现了一个基于上述方案的光突发数据收发卡,包括突发数据恢复、突发数据发送控制、物理层数据发送、数据接收及外围电路等。主要内容如下:
1)对现有的突发收发技术以及OBS突发收发的需求进行了较详细的分析,在此基础上提出了一种基于FPGA的OBS边缘节点突发收发卡的设计方案,包括物理层硬件逻辑和外围接口电路两部分。并在FPGA内设计实现了100M的以太网物理层数据发送和数据接收功能。
2)对过采样突发数据恢复的原理进行分析,并在FPGA内对基于空间过采样的数据恢复模块进行设计与实现。给出了数据采样、边沿检测、最佳时刻选取、恢复数据输出等模块的具体设计与实现,并对整个突发数据恢复模块进行了时序优化。通过对采样触发器组进行手动布局解决了异步输入的路径延迟对齐问题;通过可变移位寄存器解决了发送时钟和接收时钟随机抖动对数据恢复的影响。
3)设计了突发发送控制逻辑电路,利用它来控制激光器驱动电路的工作状态来实现光路数据的突发发送。并完成了外围电路的元器件选择、原理图设计、布板工作和硬件调试工作。
4)设计了突发收发卡的测试方案和相应的测试程序,对突发收发功能以及误码率和协议兼容性进行了测试。测试结果表明:突发收发卡可以完成突发收发功能,其误码率可达10~(-8),可以达到通信系统的要求。而且突发收发卡的物理层与802.3以太网物理层兼容。
Optical Burst Switching (OBS) networks can fully utilize bandwidth resource of DWDM optical networks and meet the requirement of burst traffics. It is a perspective solution for IP over WDM. Optical burst mode transmission and receiving technology is the key technologies for OBS edge nodes. This dissertation focuses on research of OBS edge’s burst transmission and receiving technology. A scheme of burst mode transceiver for OBS edge based on FPGA is proposed, where burst mode receiving is implemented by space over-sampling technology, and burst mode transmission is implemented through controlling the work state of laser driver circuit. A burst mode transmitting/receiving card for OBS based on the proposed scheme is designed and implemented, which includes burst mode data recovery, burst data transmitting control,data transmission, data reception and relative periphery circuit. The main contents of the dissertation are as follows:
1. Analyzing carefully current optical burst transceiver’s development situation and the special requirements of burst transceiver in OBS networks. A scheme of optical burst transceiver based on FPGA technology is proposed, which consists of hardware logic for PHY layer and periphery circuit. Then the design and implementation of data transmission module and data reception module for 100M Ethernet PHY in FPGA is given in detail.
2. The principle of over-sampling technology for data recovery is described and analyzed. The data recovery based on over-sampling technology in FPGA is designed and implemented including data sampling, edge detecting, best sampling point choosing and recovered data output. The problem of path delay control of asynchronous input is resolved through manual placement for sampling register banks. A configurable shift register is designed to overcome the influence of random clock jitter on data recovery.
3. The design and implementation of control logic circuit for burst transmission is completed, where burst transmission of optical signal is realized through controlling the work state of laser’s driver circuit. Device choosing, schematic design, PCB’s placement and route and the debug of the periphery circuit are completed.
4. A test scheme for optical burst transceiver and related testbench is designed. The basic function and the performance of burst transceiver such as bit error rate and protocol compatibility is tested. The results shows that burst transceiver can work normally with bit error rate of 10~(-8), which can meet requirement of communication system. It is also compatible with 802.3 Ethernet PHY.
1)对现有的突发收发技术以及OBS突发收发的需求进行了较详细的分析,在此基础上提出了一种基于FPGA的OBS边缘节点突发收发卡的设计方案,包括物理层硬件逻辑和外围接口电路两部分。并在FPGA内设计实现了100M的以太网物理层数据发送和数据接收功能。
2)对过采样突发数据恢复的原理进行分析,并在FPGA内对基于空间过采样的数据恢复模块进行设计与实现。给出了数据采样、边沿检测、最佳时刻选取、恢复数据输出等模块的具体设计与实现,并对整个突发数据恢复模块进行了时序优化。通过对采样触发器组进行手动布局解决了异步输入的路径延迟对齐问题;通过可变移位寄存器解决了发送时钟和接收时钟随机抖动对数据恢复的影响。
3)设计了突发发送控制逻辑电路,利用它来控制激光器驱动电路的工作状态来实现光路数据的突发发送。并完成了外围电路的元器件选择、原理图设计、布板工作和硬件调试工作。
4)设计了突发收发卡的测试方案和相应的测试程序,对突发收发功能以及误码率和协议兼容性进行了测试。测试结果表明:突发收发卡可以完成突发收发功能,其误码率可达10~(-8),可以达到通信系统的要求。而且突发收发卡的物理层与802.3以太网物理层兼容。
Optical Burst Switching (OBS) networks can fully utilize bandwidth resource of DWDM optical networks and meet the requirement of burst traffics. It is a perspective solution for IP over WDM. Optical burst mode transmission and receiving technology is the key technologies for OBS edge nodes. This dissertation focuses on research of OBS edge’s burst transmission and receiving technology. A scheme of burst mode transceiver for OBS edge based on FPGA is proposed, where burst mode receiving is implemented by space over-sampling technology, and burst mode transmission is implemented through controlling the work state of laser driver circuit. A burst mode transmitting/receiving card for OBS based on the proposed scheme is designed and implemented, which includes burst mode data recovery, burst data transmitting control,data transmission, data reception and relative periphery circuit. The main contents of the dissertation are as follows:
1. Analyzing carefully current optical burst transceiver’s development situation and the special requirements of burst transceiver in OBS networks. A scheme of optical burst transceiver based on FPGA technology is proposed, which consists of hardware logic for PHY layer and periphery circuit. Then the design and implementation of data transmission module and data reception module for 100M Ethernet PHY in FPGA is given in detail.
2. The principle of over-sampling technology for data recovery is described and analyzed. The data recovery based on over-sampling technology in FPGA is designed and implemented including data sampling, edge detecting, best sampling point choosing and recovered data output. The problem of path delay control of asynchronous input is resolved through manual placement for sampling register banks. A configurable shift register is designed to overcome the influence of random clock jitter on data recovery.
3. The design and implementation of control logic circuit for burst transmission is completed, where burst transmission of optical signal is realized through controlling the work state of laser’s driver circuit. Device choosing, schematic design, PCB’s placement and route and the debug of the periphery circuit are completed.
4. A test scheme for optical burst transceiver and related testbench is designed. The basic function and the performance of burst transceiver such as bit error rate and protocol compatibility is tested. The results shows that burst transceiver can work normally with bit error rate of 10~(-8), which can meet requirement of communication system. It is also compatible with 802.3 Ethernet PHY.
引文
[1] 吴龟灵,光交换相关技术研究,上海交通大学博士后出站报告,2003.10,pp.7
[2] 丁桥, 陈建平, 李新碗等,基于 Gbit 以太网卡光突发交换边缘节点功能的设计和实现,光通信设备,2004 年第二期,pp.59~61
[3] 余学德,邱琪,王学民,1.25 Gb/s 光突发模式接收机的设计,电子科技大学学 报,2004 年 12 月,pp.706~709
[4] Yong-Hun Oh Sang-Gug Lee, Quan Le, Ho-Yong Kang, A CMOS Burst-Mode Optical Transmitter for 1.25-Gb/s Ethernet PON Applications, IEEETRANSACTIONS ON CIRCUITS AND SYSTEMS—II: EXPRESS BRIEFS, Vol.52, No. 11, Nov 2005, pp.780~783
[5] 刘冬, [突发模式接收机及其在光交换中的应用研究],上海交通大学硕士学位论文,2006,pp.10
[6] J. M. Baek J, W. Kwon, J. W. Park, Low-Cost and High-Performance APD Burst-Mode Receiver Employing Commercial TIA for 1.25-Gb/s EPON, IEEE PHOTONICS TECHNOLOGY LETTERS, Volume 17,Issue 10, Oct 2005, pp.2170~2172
[7] 杨孝平,[突发模式光发射和时钟技术研究],电子科技大硕士学位论文,2005,pp.9
[8] 冉然,邱琪.,适用于 2.5Gb/s 光突发接收的高稳定性前置放大器,现代传输,2007 年 02 期, pp.66~69
[9] 梁敏,EPON 系统中突发接收的 CDR 电路研究与设计,武汉理工大学学报,2005 年 10 月,pp.93~96
[10] Alan Li, Julien Faucher, Burst-Mode Clock and Data Recovery in Optical Multiaccess Networks Using Broad-Band PLLs, IEEE PHOTONICS TECHNOLOGY LETTERS, Volume 18,Issue 1, Jan 2006,pp.73~75
[11] 胡军,[高速光突发模式时钟同步], 电子科技大学硕士学位论文,2005, pp.9~10
[12] 陈伟,周鹏,突发式接收电路中的数据和时钟的恢复技术,武汉理工大学学报, 2003 年 12 月,pp.868~870
[13] 武汉正源,1250Mbps GEPON ONU Transceiver PNF-S73D79D-X ONU for GPON, http://www.genuine-opto.com/english/search.jsp?action=search1.
[14] S. I. Ahmed Tad A. Kwasniewski, Overview of Oversampling Clock And Data Recovery Circuits, IEEE CCECE/CCGE, Saskatoon, May 2005, pp.1876~ 1881
[15] XILINX, Data Recovery, July 11, 2005, http://www.xilinx.com/support/documentation/application_notes/xapp224.pdf
[16] ALTERA, Serial Digital Interface Reference Design for Cyclone & Stratix Devices, August 2004, http://www.altera.com.cn/literature/an/an356.pdf
[17] 吴继华,王诚,《ALTERA FPGA/CPLD 设计(高级篇)》,人民邮电出版社,2005.7
[18] 叶凯,叶家骏, 林如俭,EPON 物理层关键技术及其实现,光通信技术,2004 年(02 期),pp.15
[19] Maxim,155Mbps to 2.5Gbps Burst-Mode Laser Driver, http://www.maxim-ic.com.cn/quick_view2.cfm/qv_pk/3808
[20] Semiconductor National, LVDS Owner’s Manual, Spring 2004, http://www.national.com/appinfo/lvds/files/ownersmanual.pdf
[21] Maxim/Dallas, HFAN-01.0: LVDS、PECL 和 CML 介绍, Oct 12, 2000, http://www.maxim-ic.com.cn/appnotes.cfm/an_pk/291
[22] “PADS2005 User Guide”, Mentor Graphics, 2005.
[23] 张海风等,《HyperLynx 仿真与 PCB 设计》,机械工业出版社,2005.9
[24] 胡晨,刘新宁,王超,一种快速 CRC 算法的硬件实现方法,电子器件, 2003 年 3 月,pp.88~91
[25] 樊昌信,张甫翊,《通信原理(第五版)》,国防工业出版社,2001.5
[26] 张雅绮,李锵,《Verilog HDL 高级数字设计》,电子工业出版社, 2005.1
[27] 吴继华,王诚,《ALTERA FPGA/CPLD 设计(基础篇)》,人民邮电出版社,2005.7
[28] ALTERA,High-Performance FPGA PLL Analysis with TimeQuest,August,2007, pp.15.
[29] “Quartus II Handbook”, Altera, 2006
[30] “ModelSim SE User’s Manual, V6.1d”, Mentor Graphics, 2006
[2] 丁桥, 陈建平, 李新碗等,基于 Gbit 以太网卡光突发交换边缘节点功能的设计和实现,光通信设备,2004 年第二期,pp.59~61
[3] 余学德,邱琪,王学民,1.25 Gb/s 光突发模式接收机的设计,电子科技大学学 报,2004 年 12 月,pp.706~709
[4] Yong-Hun Oh Sang-Gug Lee, Quan Le, Ho-Yong Kang, A CMOS Burst-Mode Optical Transmitter for 1.25-Gb/s Ethernet PON Applications, IEEETRANSACTIONS ON CIRCUITS AND SYSTEMS—II: EXPRESS BRIEFS, Vol.52, No. 11, Nov 2005, pp.780~783
[5] 刘冬, [突发模式接收机及其在光交换中的应用研究],上海交通大学硕士学位论文,2006,pp.10
[6] J. M. Baek J, W. Kwon, J. W. Park, Low-Cost and High-Performance APD Burst-Mode Receiver Employing Commercial TIA for 1.25-Gb/s EPON, IEEE PHOTONICS TECHNOLOGY LETTERS, Volume 17,Issue 10, Oct 2005, pp.2170~2172
[7] 杨孝平,[突发模式光发射和时钟技术研究],电子科技大硕士学位论文,2005,pp.9
[8] 冉然,邱琪.,适用于 2.5Gb/s 光突发接收的高稳定性前置放大器,现代传输,2007 年 02 期, pp.66~69
[9] 梁敏,EPON 系统中突发接收的 CDR 电路研究与设计,武汉理工大学学报,2005 年 10 月,pp.93~96
[10] Alan Li, Julien Faucher, Burst-Mode Clock and Data Recovery in Optical Multiaccess Networks Using Broad-Band PLLs, IEEE PHOTONICS TECHNOLOGY LETTERS, Volume 18,Issue 1, Jan 2006,pp.73~75
[11] 胡军,[高速光突发模式时钟同步], 电子科技大学硕士学位论文,2005, pp.9~10
[12] 陈伟,周鹏,突发式接收电路中的数据和时钟的恢复技术,武汉理工大学学报, 2003 年 12 月,pp.868~870
[13] 武汉正源,1250Mbps GEPON ONU Transceiver PNF-S73D79D-X ONU for GPON, http://www.genuine-opto.com/english/search.jsp?action=search1.
[14] S. I. Ahmed Tad A. Kwasniewski, Overview of Oversampling Clock And Data Recovery Circuits, IEEE CCECE/CCGE, Saskatoon, May 2005, pp.1876~ 1881
[15] XILINX, Data Recovery, July 11, 2005, http://www.xilinx.com/support/documentation/application_notes/xapp224.pdf
[16] ALTERA, Serial Digital Interface Reference Design for Cyclone & Stratix Devices, August 2004, http://www.altera.com.cn/literature/an/an356.pdf
[17] 吴继华,王诚,《ALTERA FPGA/CPLD 设计(高级篇)》,人民邮电出版社,2005.7
[18] 叶凯,叶家骏, 林如俭,EPON 物理层关键技术及其实现,光通信技术,2004 年(02 期),pp.15
[19] Maxim,155Mbps to 2.5Gbps Burst-Mode Laser Driver, http://www.maxim-ic.com.cn/quick_view2.cfm/qv_pk/3808
[20] Semiconductor National, LVDS Owner’s Manual, Spring 2004, http://www.national.com/appinfo/lvds/files/ownersmanual.pdf
[21] Maxim/Dallas, HFAN-01.0: LVDS、PECL 和 CML 介绍, Oct 12, 2000, http://www.maxim-ic.com.cn/appnotes.cfm/an_pk/291
[22] “PADS2005 User Guide”, Mentor Graphics, 2005.
[23] 张海风等,《HyperLynx 仿真与 PCB 设计》,机械工业出版社,2005.9
[24] 胡晨,刘新宁,王超,一种快速 CRC 算法的硬件实现方法,电子器件, 2003 年 3 月,pp.88~91
[25] 樊昌信,张甫翊,《通信原理(第五版)》,国防工业出版社,2001.5
[26] 张雅绮,李锵,《Verilog HDL 高级数字设计》,电子工业出版社, 2005.1
[27] 吴继华,王诚,《ALTERA FPGA/CPLD 设计(基础篇)》,人民邮电出版社,2005.7
[28] ALTERA,High-Performance FPGA PLL Analysis with TimeQuest,August,2007, pp.15.
[29] “Quartus II Handbook”, Altera, 2006
[30] “ModelSim SE User’s Manual, V6.1d”, Mentor Graphics, 2006