基于FPGA的高性能计算架构硬件任务与资源模型研究
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摘要
高性能计算是一个国家的综合国力的体现，是支撑国家实力持续发展的关键技术之一。近年来，高性能计算机体系结构技术研究发生了改变，异构体系结构已成为未来高性能计算机发展的主要趋势。基于FPGA的可重构计算作为一种新的体系结构，让系统拥有了硬件的高性能，又具备了软件的灵活性。通过采用主/协处理器技术，将计算的任务交由计算加速部件以硬件任务完成，而任务管理等，则交由通用处理器来完成，达到一个优化的计算效果。
本文主要对基于FPGA计算加速的异构高性能计算架构上的任务与资源管理算法与计算模型方面的研究。在研究与分析当前高性能计算体系结构的发展趋势的基础上，以异构高性能计算平台为研究目标，结合FPGA计算加速，通过对多体问题（N-body）求解的FMM算法在FPGA计算加速的加速效果，通过分析FPGA加速上的计算性能效果，提出了多级加速优化方案与对应的计算架构。
资源管理是任务调度研究的基础，通过研究查找空闲矩形空间的算法来遍历这些最大的空闲空间矩形MFR全集，本文分别以基于状态矩阵模型与运行任务边线模型来研究MFR全集查找与管理算法。为有效查找与管理MFR全集，在基于资源状态矩阵模型中提出了基于双向倒形塔的MFR全集扫描求解算法，并在此基础了又给出扫描优化算法与M值标示优化算法。在基于运行任务边线模型上，提出了基于上右边线交点CPTR的全集MFR查找算法，并给出了在线调度时的基于FPGA局部影响空间上的MFR全集更新算法。
高性能计算平台多是属于商业应用计算平台，要为众多的高性能计算用户提供计算服务，针对高性能计算平台的多级任务调度模型，提出了基于本地资源FPGA上的时间与空间情境CBTA的多情境状态的硬件任务放置与调度算法体系，并根据设置的不同的任务情境与资源情境状态，提出了多种不同的适应于任务与资源情境状态下的任务调度与放置算法。采用让每个计算资源节点根据自己的资源情境状态变化，而主动去选择对应自己情境的任务的自适应任务调度策略，并给出了CBTA调度算法的并行优化策略。最后通过实验来说明了算法在对用户响应时间、负载均衡以及任务拒绝率上的优势。
High performance computing level can reflect the national comprehensivestrength, becoming one of the key technologies that support national powersustainable development. In recent years, as the change of the technology ofarchitecture high performance computer, heterogeneous architecture has become themajor trend of the future high performance computer development. As the newarchitecture, the reconfigurable computing architecture based on FPGA, make thesystem with the high performance of the hardware, samely with the flexibility ofsoftware. The computing task is mainly finished by computing accelerator ashardware task, while the task management, finished by general processor to achievethe optimal computing effects by adopting the main processor and co-processortechnology.
This paper mainly performs the research and analysis on the hardware task andresource management, computing model of heterogeneous high performancearchitecture based on FPGA computing accelerate. With the analysis of developmenttrend of current high performance system architecture, aiming at the heterogeneoushigh performance computing platform, through the FPGA computing accelerate, thecomputing accelerate ratio of FMM algorithm used to solve the N-body problem.The multi-level computing accelerate optimization scheme and computingarchitecture is proposed according to the computing effect og the FPGA computingaccelerate.
As resource management is the basis of the task scheduling, to hardwareresource management of FPGA is to find all set of the free rectangles named MFRon FPGA rectangle area. We use two methods respectively state matrix model andrunning hardware task edge line model to compute all set of the MFRs. Based on thestate matrix model, a two-way inverted tower based MFR all set scanning algorithmis putforward and the scanning optimization algorithm and M value markingoptimization algorithm are also given. On the basis of running hardware task edgeline model, a MFR all set seeking algorithm based on CPTR is proposed. And thenbased on this model, in this paper, the resource management algorithm based onCPTR on run-time hardware task schedule is given.
Most of the high performance computing platform belongs to publiccommercial computing platform that providing computing services for many highperformance computing users. Aimimg at the multi-level of the task schedule modelon high performance computing platform, a hardware task schedule and placementalgorithm and system is proposed on the basis of context of time and area namedCBTA of FPGA resource. According to the current different status of each task andresource context, we put forward and adopt different task placement and schedulealgorithms to adapt the matching of each task context amd resource conext. A self-adaptive task scheduling strategy is adopted is that Based on the dynamictransformation of the resource context status of the computing node, the node taskscheduler select task that corresponding to its context status. In order to improve theresponse time of the task schedule, the parallel optimization strategy is adopted inthe task schedule of CBTA. Finally through the experiment, the advantage of CBTAon response time, load balance and task reject ratio is shown.
本文主要对基于FPGA计算加速的异构高性能计算架构上的任务与资源管理算法与计算模型方面的研究。在研究与分析当前高性能计算体系结构的发展趋势的基础上，以异构高性能计算平台为研究目标，结合FPGA计算加速，通过对多体问题（N-body）求解的FMM算法在FPGA计算加速的加速效果，通过分析FPGA加速上的计算性能效果，提出了多级加速优化方案与对应的计算架构。
资源管理是任务调度研究的基础，通过研究查找空闲矩形空间的算法来遍历这些最大的空闲空间矩形MFR全集，本文分别以基于状态矩阵模型与运行任务边线模型来研究MFR全集查找与管理算法。为有效查找与管理MFR全集，在基于资源状态矩阵模型中提出了基于双向倒形塔的MFR全集扫描求解算法，并在此基础了又给出扫描优化算法与M值标示优化算法。在基于运行任务边线模型上，提出了基于上右边线交点CPTR的全集MFR查找算法，并给出了在线调度时的基于FPGA局部影响空间上的MFR全集更新算法。
高性能计算平台多是属于商业应用计算平台，要为众多的高性能计算用户提供计算服务，针对高性能计算平台的多级任务调度模型，提出了基于本地资源FPGA上的时间与空间情境CBTA的多情境状态的硬件任务放置与调度算法体系，并根据设置的不同的任务情境与资源情境状态，提出了多种不同的适应于任务与资源情境状态下的任务调度与放置算法。采用让每个计算资源节点根据自己的资源情境状态变化，而主动去选择对应自己情境的任务的自适应任务调度策略，并给出了CBTA调度算法的并行优化策略。最后通过实验来说明了算法在对用户响应时间、负载均衡以及任务拒绝率上的优势。
High performance computing level can reflect the national comprehensivestrength, becoming one of the key technologies that support national powersustainable development. In recent years, as the change of the technology ofarchitecture high performance computer, heterogeneous architecture has become themajor trend of the future high performance computer development. As the newarchitecture, the reconfigurable computing architecture based on FPGA, make thesystem with the high performance of the hardware, samely with the flexibility ofsoftware. The computing task is mainly finished by computing accelerator ashardware task, while the task management, finished by general processor to achievethe optimal computing effects by adopting the main processor and co-processortechnology.
This paper mainly performs the research and analysis on the hardware task andresource management, computing model of heterogeneous high performancearchitecture based on FPGA computing accelerate. With the analysis of developmenttrend of current high performance system architecture, aiming at the heterogeneoushigh performance computing platform, through the FPGA computing accelerate, thecomputing accelerate ratio of FMM algorithm used to solve the N-body problem.The multi-level computing accelerate optimization scheme and computingarchitecture is proposed according to the computing effect og the FPGA computingaccelerate.
As resource management is the basis of the task scheduling, to hardwareresource management of FPGA is to find all set of the free rectangles named MFRon FPGA rectangle area. We use two methods respectively state matrix model andrunning hardware task edge line model to compute all set of the MFRs. Based on thestate matrix model, a two-way inverted tower based MFR all set scanning algorithmis putforward and the scanning optimization algorithm and M value markingoptimization algorithm are also given. On the basis of running hardware task edgeline model, a MFR all set seeking algorithm based on CPTR is proposed. And thenbased on this model, in this paper, the resource management algorithm based onCPTR on run-time hardware task schedule is given.
Most of the high performance computing platform belongs to publiccommercial computing platform that providing computing services for many highperformance computing users. Aimimg at the multi-level of the task schedule modelon high performance computing platform, a hardware task schedule and placementalgorithm and system is proposed on the basis of context of time and area namedCBTA of FPGA resource. According to the current different status of each task andresource context, we put forward and adopt different task placement and schedulealgorithms to adapt the matching of each task context amd resource conext. A self-adaptive task scheduling strategy is adopted is that Based on the dynamictransformation of the resource context status of the computing node, the node taskscheduler select task that corresponding to its context status. In order to improve theresponse time of the task schedule, the parallel optimization strategy is adopted inthe task schedule of CBTA. Finally through the experiment, the advantage of CBTAon response time, load balance and task reject ratio is shown.
引文
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