基于非易失存储应用的新型金属纳米晶薄膜制备工艺
|
摘要
与传统浮栅结构的非易失存储器相比,基于分布式电荷俘获存储机理的金属纳米晶存储器,具有更低的操作电压和更强的数据保持能力,并且能解决当集成工艺节点进入65nm以下时,器件尺寸可持续缩小的难题,而被视为最有前途的下一代非易失存储器之一。薄膜沉积后退火纳米晶化法是目前应用最广的金属纳米晶制备方法。但其后续600~900℃高温退火会带来高热预算等一系列问题,影响工艺的集成性,恶化器件的电学特性和可靠性。
本文提出了与CMOS工艺完全兼容、工艺简单、热预算低的金属纳米晶制备的新方法—控制氧化层沉积过程中的同步金属薄膜原位纳米晶化法,可有效地改善上述薄膜沉积后退火纳米晶化法的不足。并依次对同步金属薄膜原位纳米晶化法进行了机理研究,通过实验采用该工艺制备了钨金属纳米层,对实验结果进行了观察、分析和讨论。
实验结果表明:(1)在控制氧化层溅射沉积过程中对硅基底同步加热(仅需300℃),可有效地促使底层3nm的钨金属层纳米晶化,即可形成尺寸约为25nm左右的纳米晶;(2)控制氧化层溅射沉积过程中,溅射原子入射硅片表面所带来的初始能量与加热硅片所带来的热量相复合,只要足以提供纳米晶化激活能所需的能量,就能促使表层金属薄膜的纳米晶化。
本文同时考虑了未来金属纳米晶存储器隧穿氧化层高介电常数(k)化的趋势,采用氧化铝作为介质层,制备了铝金属纳米晶存储器件结构。实验结果的不理想揭示了实验过程中的一系列问题,总结了经验与教训,以期在经后的研究中得到改进。
最后对本文进行了总结,计划了下阶段的研究内容,并对未来金属纳米晶存储器的研究进行了展望。
Compared with conventional floating-gate memories, metal nanocrystal memories, which are based on the storage mechanism of discrete charge trapping, have showed much excellent performance as lower operation voltage and longer retention time, etc, and are able to resolve the difficulties in continued scaling of device structure beyond 65-nm nod in integration application. It is considered as one of the most promising non-volatile memories in next generation. Nowadays, the most widely used metal nanocrystal fabrication process is called post-annealing nano-crystallization method, which is operated after metal thin film being deposited. However, this process needs high temperature, 600~900℃usually, suffers high thermal budget which has negative influence on process integration and will worsen the performance and reliability of devices.
In this paper, a novel metal nanocrystal fabrication process, which has low thermal budget and is simple, completely compatible with CMOS processes, is proposed, named metal thin film synchronously in-situ nano-crystallization process. It is able to resolve these problems mentioned above. Also, the mechanism of metal thin film synchronously in-situ nano-crystallization process is investigated, and a tungsten (W) nanocrystal layer is fabricated in the experiment using this process, then follow the observation, analyses and discussion of the experiment result.
The experiment result demonstrates that: (1) 3nm tungsten metal layer which underlies control oxide can effectively achieve nano-crystallization when the wafer substrate is synchronously heated, only 300 needed, during the control oxide deposition process, And the nanocrystals' sizes are about 25nm; (2) In the process of control oxide deposition through sputtering, the metal thin film can be successfully urged to nano-crystallize as long as the activating energy for nano-crystallization can be offered by the combining energy brought by incident sputtering atoms and wafer heating.
Furthermore, since there is a growing tendency in using high dielectric constant (high K) materials as the oxide layers in metal nanocrystal memories. A stacked structure of Al nanocrystals embedded in Al2O3 layers is prepared in experiment. The failed experiment result indicates a series of problems in experiment process; reasons have been concluded and discussed. Improvement should be handled in next period.
In the end, the whole paper is summarized and research contents are arranged. And the expectations of future metal nanocrystal memory investigation are also made.
本文提出了与CMOS工艺完全兼容、工艺简单、热预算低的金属纳米晶制备的新方法—控制氧化层沉积过程中的同步金属薄膜原位纳米晶化法,可有效地改善上述薄膜沉积后退火纳米晶化法的不足。并依次对同步金属薄膜原位纳米晶化法进行了机理研究,通过实验采用该工艺制备了钨金属纳米层,对实验结果进行了观察、分析和讨论。
实验结果表明:(1)在控制氧化层溅射沉积过程中对硅基底同步加热(仅需300℃),可有效地促使底层3nm的钨金属层纳米晶化,即可形成尺寸约为25nm左右的纳米晶;(2)控制氧化层溅射沉积过程中,溅射原子入射硅片表面所带来的初始能量与加热硅片所带来的热量相复合,只要足以提供纳米晶化激活能所需的能量,就能促使表层金属薄膜的纳米晶化。
本文同时考虑了未来金属纳米晶存储器隧穿氧化层高介电常数(k)化的趋势,采用氧化铝作为介质层,制备了铝金属纳米晶存储器件结构。实验结果的不理想揭示了实验过程中的一系列问题,总结了经验与教训,以期在经后的研究中得到改进。
最后对本文进行了总结,计划了下阶段的研究内容,并对未来金属纳米晶存储器的研究进行了展望。
Compared with conventional floating-gate memories, metal nanocrystal memories, which are based on the storage mechanism of discrete charge trapping, have showed much excellent performance as lower operation voltage and longer retention time, etc, and are able to resolve the difficulties in continued scaling of device structure beyond 65-nm nod in integration application. It is considered as one of the most promising non-volatile memories in next generation. Nowadays, the most widely used metal nanocrystal fabrication process is called post-annealing nano-crystallization method, which is operated after metal thin film being deposited. However, this process needs high temperature, 600~900℃usually, suffers high thermal budget which has negative influence on process integration and will worsen the performance and reliability of devices.
In this paper, a novel metal nanocrystal fabrication process, which has low thermal budget and is simple, completely compatible with CMOS processes, is proposed, named metal thin film synchronously in-situ nano-crystallization process. It is able to resolve these problems mentioned above. Also, the mechanism of metal thin film synchronously in-situ nano-crystallization process is investigated, and a tungsten (W) nanocrystal layer is fabricated in the experiment using this process, then follow the observation, analyses and discussion of the experiment result.
The experiment result demonstrates that: (1) 3nm tungsten metal layer which underlies control oxide can effectively achieve nano-crystallization when the wafer substrate is synchronously heated, only 300 needed, during the control oxide deposition process, And the nanocrystals' sizes are about 25nm; (2) In the process of control oxide deposition through sputtering, the metal thin film can be successfully urged to nano-crystallize as long as the activating energy for nano-crystallization can be offered by the combining energy brought by incident sputtering atoms and wafer heating.
Furthermore, since there is a growing tendency in using high dielectric constant (high K) materials as the oxide layers in metal nanocrystal memories. A stacked structure of Al nanocrystals embedded in Al2O3 layers is prepared in experiment. The failed experiment result indicates a series of problems in experiment process; reasons have been concluded and discussed. Improvement should be handled in next period.
In the end, the whole paper is summarized and research contents are arranged. And the expectations of future metal nanocrystal memory investigation are also made.
引文
[1] H I Hanafi, S Tiwari, and I Khan. Fast and long retention-time nanocrystal memory[J]. IEEE Trans Electron Devices, 1996, 43:1553–1558.
[2] Jan De Blauwe. Nanocrystal Nonvolatile Memory Devices[J]. IEEE TRANSACTIONS ON NANOTECHNOLOGY, 2002, 1[1):72–77.
[3] C J Nicklaw, M P Pagey, S T Pantelides, et al. Defects and nanocrystals generated by Si implantation into a-SiO[J]. IEEE Trans Nucl Sci, 2000, 47:2269–2275.
[4] S Tiwari, F Rana, K Chan, et al. Volatile and nonvolatile memories in silicon with nano-crystal storage[J]. IEEE Int Electron Devices Meeting Tech Dig. 1995, 1:521–524.
[5] J De Blauwe, M Ostraat, M Green, et al. A novel, aerosol-nanocrystal floating-gate device for nonvolatile memory applications[J]. IEEE Int Electron Devices Meeting (IEDM) Tech Dig, 2000, 1:683–686.
[6] Y C King, T J King, C Hu. Charge-trap memory device fabricated by oxidation of Si1-xGex[J]. IEEE Trans Electron Devices, 2001, 3[48]:696–700.
[7] M She, Y C King, T J King, et al. Modeling and design study of nanocrystal memory devices[J]. Proc 59th Device Research Conf, 2001, 1:139–140.
[8] Kwangseok Han, Ilgweon Kim, Hyungcheol Shin. Characteristics of P-channel Si Nano-crystal Memory[J]. IEDM Technical Digest, International Electron Devices Meeting, 2000, 12:309-312.
[9] Y Shi, S L Gu, X L Yuan, et al. Silicon nano-crystals based MOS memory and effects of traps on charge storage characteristics[J]. Proc 5th Int Conf Solid-State and Integrated Circuit Technology, 1998, 1: 838–841.
[10] W Eckstein, O N Gorshkov, A P Kasatkin, et al. Modeling of the formation and properties of nanocrystals in insulator matrices (SiO :Si, ZrO (Y):Zr) produced by ion implantation[J]. Conf on Ion Implantation Technology, 2000, 1: 757–760.
[11] B Prince, Trends in scaled and nanotechnology memories[J], Non-Volatile Memory Technology Symposium, 2005, 11:55–61.
[12] Chih Yuan Lu, Chih Chieh Yeh, Advanced Non-Volatile Memory Devices with Nano-Technology[R]. 15th International Conference on Ion Implantation Technology, 2004
[13] 杨红官,施毅,闾锦,等. 锗/硅异质纳米结构中空穴存储特性研究[J]. 物理学报,2004, 53[4]: 1211-1216.
[14] Zengtao Liu, Chungho Lee, Venkat Narayanan, et al. Metal Nanocrystal Memories—Part I: Device Design and Fabrication[J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2002, 49[ 9]:1606–1631.
[15] P H Yeh, L J Chen, P T Liu, et al. Metal nanocrystals as charge storage nodes for nonvolatile memory devices[J]. ScienceDirect Electrochimica Acta, 2006, EA-11974: 7.
[16] Takata, S Kondoh. New Non-Volatile Memory with Extremely High Density Metal Nano-Dots[J]. 2003 IEEE, IEDM Technical Digest, 2003, 1:553-556.
[17] 吴兴华. 金属奈米点在低功率非挥发性记忆体元件之应用与研究[D]. 台湾:国立中山大学物理研究所,2004.
[18] L Xu, W Zhou. Metal Sphere Photonic Crystals by Nanomolding[J]. Am Chem Soc , 2001, 123:763-764.
[19] Q.Wang, Z.T. Song, et al., Synthesis and electron storage characteristics of isolated silver nanodots on/embedded in Al2O3 gate dielectric, Applied Surface Science, v230,(2004: 8–11).
[20] S. Kolliopoulou, P. Dimitrakis, et al., Integration of organic insulator and self-assembled gold nanoparticles on Si MOSFET for novel non-volatile memory cells. Microelectronic Engineering, v73-74, 2004: 725–729.
[21] 胡赓祥,蔡珣.材料科学基础[M].上海交通大学出版社,2000:372.
[22] 卢柯. Lu K, Acta Metall[J]. 1994,30(1):1252~1256.
[23] 周效锋 .Fe73.5Cu1Nb3Si13.5B9. 非晶合金的激波纳米晶化研究 [J]. 物理学报,1999.48(11):2099~2103.
[24] Z. Suo and Z. Zhang. Epitaxial films stabilized by long-range forces. Phys. Rev. B, vol. 58, pp. 5116–5120, Aug. 1998.
[25] Roth J R. Industrial Plasma Engineering[M]. Vol 1, Principles. Bristol: Institute of Physics Publishing,1995
[26] 赵化侨. 等离子体化学与工艺[M],中国科学技术大学出版社,1993.
[27] Kohler K, Coburn J W, Horne D E, et al. Plasma potentials of 13.56-MHz RF argon glow discharges in a planar system[J]. Appl Phys,1985,57(1):59～66.
[28] 李志刚,丁玉成. 等离子体浓度对离子撞击材料表面能量通量的影响. 电工技术学报,2006,21(7):12.
[29] Michael Quirk, Julian Serda. Semiconductor Manufacturing Technology. Publishing House of Electronics Industry,2005:291.
[30] Qing-Yu Zhang. Sputtering and Thin-film Processes. State Key Laboratory of Materials Modification by Laser, Ion and State Key Laboratory of Materials Modification by Laser, Ion and Electron Beams Electron Beams Dalian University of Technology, China: 4.
[31] Hebrert M. Urbassek. Molecular-dynamics simulation of sputtering. Nucl Instru and Methods in Phys Research, B122, 1997: 427.
[32] Liu A Y, Cohen M L. Predication of New Low Compressibility Solids. Science, 245, 1989:841.
[33] 崔虎. 射频磁控溅射镀膜过程中离子输运和溅射行为的模拟计算. 西北工业大学, 2005: 74.
[34] M. J. Kushner. Distribution of ion energy incident on electrodes in capacitively coupled rf Discharge [J].Appl.Phys.58 (11), 1985:4024.
[35] Michael A Lieberrna. Analytical solution for capacitive rf sheath [J]. IEEE Transaction on Plasma Science, v.16, n.6, 1988: 638.
[36] Terrence E. Sheridian, JR and John A. Goree. Analytic expression for electric potential in the plasma sheath. IEEE Transaction on Plasma Science,v.17, n.6, 1989: 884.
[37] Michael. A. Lieberrna. Dynamics of collisional capacitive rf sheath. IEEE Transaction on Plasma Science, v.17, n.2, 1989:338.
[38] Valey A. Godyak. A comparison of rf electrode sheath models. IEEE Transaction on Plasma Science, v.21, n.4, 1993:378.
[39] J. Liu, GL. Huppert, H. H. Sawin. Ion bombarment in rf Plasma [J]. Appl. phys., 68(8), 1990:3916.
[40] Joachim Janes, Christopph Huth. Energy- resolved angular distribution of O+ ions at the radio frequency-powered electrode in reactive ion etching [J]. Vac. Sci. Technol., A 10(5), 1992:3086.
[41] 程守沫,江之永. 普通物理学. 高等教育出版社,1982.
[42] Don E. Harrison, Jr. Sputtering Models-A Synoptic View. Radiation Effects,v.70, 1983:1.
[43] Ryogo Kubo. Electronic Properties of Metallic Fine Particles. Journal of the physical society of Japan [J],1962,Vol. 17, No.6:975-986.
[44] Zeng tao Liu, Chung hoLee, Venkat Narayanan, et al. Metal Nanocrystal Memories-Part II: Electrical Characteristics. IEEE TRANSACTIONS ON ELECTRON DEVICES [J], 2002, VOL.49, NO.9:1614-1622.
[45] 黄昆. 固体物理学[M]. 北京:高等教育出版社,1988.
[46] Lee C, Hou T H, Kan E CC. Nonvolatile memory with a metal nanocrystal/nitride heterogeneous floating-gate[J]. IEEE Trans Elec Dev, 2005, 52(12):2697-2702.
[47] 黄瑞,马平平.费米能级之近似计算.首都师范大学学报[J],1995,16(4):52-55.
[48] Moore.G.E. Progress in digital integrated electronics. IEEE IEDM Tech. Dig. 11-13 (1975).
[49] Raymond Heald, Wang Ping. Variability in sub-100nm SRAM designs. Semiconductor Industry Association (SIA), The national technology roadmap for semiconductors, Austin, 2001.
[50] Dennard R, Aensslen F G. Design of ion-implanted MOSFET’s with very small physical dimensions. IEEE J Solid-State Circuits,1974, (9): 256.
[51] 陆旭兵. 应用于下一代 MOSFET 中的高介电栅介质材料的研究[博士学位论文].南京大学固体微结构实验室.2-3.
[52] Wilk G D, Wallace R M, Anthony J M. High-K gate dielectrics: current status and materials properties considerations[J]. Appl Phys, 2001, 89: 524.
[53] Chatterjee A, Rodder M. A transistor performance figure-of-merit including the effect of gate resistance and its application to scaling to sub-0.25μm CMOS logic technologies. IEEE Trans Electron Devices, 1998, 45: 124.
[54] Muller D A, Sorsch T, Moccio S, et al. The electronic structure at the atomic scale of ultrathin gate oxides. Nature, 1999, 399: 75.
[55] Tang S P, Wallace R M, Seabaugh A, et al. Evaluating the minimum thickness of gate oxide on silicon using first-principles method. Appl Surf Sci, 1998, 135: 137.
[56] Neaton B, Muller D A, Ashcroft N W. Electronic properties of the Si/SiO2 interface from first principles. Phys Rev Lett,2000, 85: 1298.
[57] Lo S H, Bushanan D A, Taur Y, et al. Quantum-mechanical modeling of electron tunneling current from the inversion layer of ultra-thin-oxide nMOSFET’s. IEEE Elec Dev Lett,1997, 18 (5): 20.
[58] Liao C C, Albert Chin, Tsai C. Electrical characterization of Al2O3 on Si from thermally oxidized AlAs and Al. J Crystal Growth, 1999, 201/202: 65.
[59] 邢溯.高介电常数材料的制备和电学性能的研究[博士学位论文].上海:中国科学院上海微系统与信息技术研究所,2002.
[60] G. D. Wilk, R. M. Wallace, J. M. Anthony, et al. Phys. 89(10), 5243(2001).
[61] 张 敏 , 丁士进 , 陈 玮 , 等 . 金属纳米晶快闪存储器研究进展 . 微电子学 , 2007,37(3):370-371.
[62] Lee J J, Harada Y, Pyun J W, et al. Nickel nanocrystal formation on HfO2 dielectric for nonvolatile memory device applications[J]. Appl Phys Lett, 2005, 86(10): 103505.
[63] Lee J J, Kwong D L. Metal nanocrystal memory with high-k tunneling barrier for improved data retention [J]. IEEE Trans Elec Dev, 2005, 52(4): 507-511.
[64] Tsoukalas D, Dimitrakis P, Kolliopoulou S, et al. Recent advances in nanoparticle memories [J]. Materials Science and Engineering B, 2005, 124: 93-101.
[65] Lee C, Gorur-Seetharam A, Kan E C. Operational and reliability comparison of discrete-storage nonvolatile memories: advantages of single- and double-layer metal nanocrystals [A]. Int Elec Dev Meet Tech Dig [C]. Washington D C, USA. 2003. 557-560.
[2] Jan De Blauwe. Nanocrystal Nonvolatile Memory Devices[J]. IEEE TRANSACTIONS ON NANOTECHNOLOGY, 2002, 1[1):72–77.
[3] C J Nicklaw, M P Pagey, S T Pantelides, et al. Defects and nanocrystals generated by Si implantation into a-SiO[J]. IEEE Trans Nucl Sci, 2000, 47:2269–2275.
[4] S Tiwari, F Rana, K Chan, et al. Volatile and nonvolatile memories in silicon with nano-crystal storage[J]. IEEE Int Electron Devices Meeting Tech Dig. 1995, 1:521–524.
[5] J De Blauwe, M Ostraat, M Green, et al. A novel, aerosol-nanocrystal floating-gate device for nonvolatile memory applications[J]. IEEE Int Electron Devices Meeting (IEDM) Tech Dig, 2000, 1:683–686.
[6] Y C King, T J King, C Hu. Charge-trap memory device fabricated by oxidation of Si1-xGex[J]. IEEE Trans Electron Devices, 2001, 3[48]:696–700.
[7] M She, Y C King, T J King, et al. Modeling and design study of nanocrystal memory devices[J]. Proc 59th Device Research Conf, 2001, 1:139–140.
[8] Kwangseok Han, Ilgweon Kim, Hyungcheol Shin. Characteristics of P-channel Si Nano-crystal Memory[J]. IEDM Technical Digest, International Electron Devices Meeting, 2000, 12:309-312.
[9] Y Shi, S L Gu, X L Yuan, et al. Silicon nano-crystals based MOS memory and effects of traps on charge storage characteristics[J]. Proc 5th Int Conf Solid-State and Integrated Circuit Technology, 1998, 1: 838–841.
[10] W Eckstein, O N Gorshkov, A P Kasatkin, et al. Modeling of the formation and properties of nanocrystals in insulator matrices (SiO :Si, ZrO (Y):Zr) produced by ion implantation[J]. Conf on Ion Implantation Technology, 2000, 1: 757–760.
[11] B Prince, Trends in scaled and nanotechnology memories[J], Non-Volatile Memory Technology Symposium, 2005, 11:55–61.
[12] Chih Yuan Lu, Chih Chieh Yeh, Advanced Non-Volatile Memory Devices with Nano-Technology[R]. 15th International Conference on Ion Implantation Technology, 2004
[13] 杨红官,施毅,闾锦,等. 锗/硅异质纳米结构中空穴存储特性研究[J]. 物理学报,2004, 53[4]: 1211-1216.
[14] Zengtao Liu, Chungho Lee, Venkat Narayanan, et al. Metal Nanocrystal Memories—Part I: Device Design and Fabrication[J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2002, 49[ 9]:1606–1631.
[15] P H Yeh, L J Chen, P T Liu, et al. Metal nanocrystals as charge storage nodes for nonvolatile memory devices[J]. ScienceDirect Electrochimica Acta, 2006, EA-11974: 7.
[16] Takata, S Kondoh. New Non-Volatile Memory with Extremely High Density Metal Nano-Dots[J]. 2003 IEEE, IEDM Technical Digest, 2003, 1:553-556.
[17] 吴兴华. 金属奈米点在低功率非挥发性记忆体元件之应用与研究[D]. 台湾:国立中山大学物理研究所,2004.
[18] L Xu, W Zhou. Metal Sphere Photonic Crystals by Nanomolding[J]. Am Chem Soc , 2001, 123:763-764.
[19] Q.Wang, Z.T. Song, et al., Synthesis and electron storage characteristics of isolated silver nanodots on/embedded in Al2O3 gate dielectric, Applied Surface Science, v230,(2004: 8–11).
[20] S. Kolliopoulou, P. Dimitrakis, et al., Integration of organic insulator and self-assembled gold nanoparticles on Si MOSFET for novel non-volatile memory cells. Microelectronic Engineering, v73-74, 2004: 725–729.
[21] 胡赓祥,蔡珣.材料科学基础[M].上海交通大学出版社,2000:372.
[22] 卢柯. Lu K, Acta Metall[J]. 1994,30(1):1252~1256.
[23] 周效锋 .Fe73.5Cu1Nb3Si13.5B9. 非晶合金的激波纳米晶化研究 [J]. 物理学报,1999.48(11):2099~2103.
[24] Z. Suo and Z. Zhang. Epitaxial films stabilized by long-range forces. Phys. Rev. B, vol. 58, pp. 5116–5120, Aug. 1998.
[25] Roth J R. Industrial Plasma Engineering[M]. Vol 1, Principles. Bristol: Institute of Physics Publishing,1995
[26] 赵化侨. 等离子体化学与工艺[M],中国科学技术大学出版社,1993.
[27] Kohler K, Coburn J W, Horne D E, et al. Plasma potentials of 13.56-MHz RF argon glow discharges in a planar system[J]. Appl Phys,1985,57(1):59～66.
[28] 李志刚,丁玉成. 等离子体浓度对离子撞击材料表面能量通量的影响. 电工技术学报,2006,21(7):12.
[29] Michael Quirk, Julian Serda. Semiconductor Manufacturing Technology. Publishing House of Electronics Industry,2005:291.
[30] Qing-Yu Zhang. Sputtering and Thin-film Processes. State Key Laboratory of Materials Modification by Laser, Ion and State Key Laboratory of Materials Modification by Laser, Ion and Electron Beams Electron Beams Dalian University of Technology, China: 4.
[31] Hebrert M. Urbassek. Molecular-dynamics simulation of sputtering. Nucl Instru and Methods in Phys Research, B122, 1997: 427.
[32] Liu A Y, Cohen M L. Predication of New Low Compressibility Solids. Science, 245, 1989:841.
[33] 崔虎. 射频磁控溅射镀膜过程中离子输运和溅射行为的模拟计算. 西北工业大学, 2005: 74.
[34] M. J. Kushner. Distribution of ion energy incident on electrodes in capacitively coupled rf Discharge [J].Appl.Phys.58 (11), 1985:4024.
[35] Michael A Lieberrna. Analytical solution for capacitive rf sheath [J]. IEEE Transaction on Plasma Science, v.16, n.6, 1988: 638.
[36] Terrence E. Sheridian, JR and John A. Goree. Analytic expression for electric potential in the plasma sheath. IEEE Transaction on Plasma Science,v.17, n.6, 1989: 884.
[37] Michael. A. Lieberrna. Dynamics of collisional capacitive rf sheath. IEEE Transaction on Plasma Science, v.17, n.2, 1989:338.
[38] Valey A. Godyak. A comparison of rf electrode sheath models. IEEE Transaction on Plasma Science, v.21, n.4, 1993:378.
[39] J. Liu, GL. Huppert, H. H. Sawin. Ion bombarment in rf Plasma [J]. Appl. phys., 68(8), 1990:3916.
[40] Joachim Janes, Christopph Huth. Energy- resolved angular distribution of O+ ions at the radio frequency-powered electrode in reactive ion etching [J]. Vac. Sci. Technol., A 10(5), 1992:3086.
[41] 程守沫,江之永. 普通物理学. 高等教育出版社,1982.
[42] Don E. Harrison, Jr. Sputtering Models-A Synoptic View. Radiation Effects,v.70, 1983:1.
[43] Ryogo Kubo. Electronic Properties of Metallic Fine Particles. Journal of the physical society of Japan [J],1962,Vol. 17, No.6:975-986.
[44] Zeng tao Liu, Chung hoLee, Venkat Narayanan, et al. Metal Nanocrystal Memories-Part II: Electrical Characteristics. IEEE TRANSACTIONS ON ELECTRON DEVICES [J], 2002, VOL.49, NO.9:1614-1622.
[45] 黄昆. 固体物理学[M]. 北京:高等教育出版社,1988.
[46] Lee C, Hou T H, Kan E CC. Nonvolatile memory with a metal nanocrystal/nitride heterogeneous floating-gate[J]. IEEE Trans Elec Dev, 2005, 52(12):2697-2702.
[47] 黄瑞,马平平.费米能级之近似计算.首都师范大学学报[J],1995,16(4):52-55.
[48] Moore.G.E. Progress in digital integrated electronics. IEEE IEDM Tech. Dig. 11-13 (1975).
[49] Raymond Heald, Wang Ping. Variability in sub-100nm SRAM designs. Semiconductor Industry Association (SIA), The national technology roadmap for semiconductors, Austin, 2001.
[50] Dennard R, Aensslen F G. Design of ion-implanted MOSFET’s with very small physical dimensions. IEEE J Solid-State Circuits,1974, (9): 256.
[51] 陆旭兵. 应用于下一代 MOSFET 中的高介电栅介质材料的研究[博士学位论文].南京大学固体微结构实验室.2-3.
[52] Wilk G D, Wallace R M, Anthony J M. High-K gate dielectrics: current status and materials properties considerations[J]. Appl Phys, 2001, 89: 524.
[53] Chatterjee A, Rodder M. A transistor performance figure-of-merit including the effect of gate resistance and its application to scaling to sub-0.25μm CMOS logic technologies. IEEE Trans Electron Devices, 1998, 45: 124.
[54] Muller D A, Sorsch T, Moccio S, et al. The electronic structure at the atomic scale of ultrathin gate oxides. Nature, 1999, 399: 75.
[55] Tang S P, Wallace R M, Seabaugh A, et al. Evaluating the minimum thickness of gate oxide on silicon using first-principles method. Appl Surf Sci, 1998, 135: 137.
[56] Neaton B, Muller D A, Ashcroft N W. Electronic properties of the Si/SiO2 interface from first principles. Phys Rev Lett,2000, 85: 1298.
[57] Lo S H, Bushanan D A, Taur Y, et al. Quantum-mechanical modeling of electron tunneling current from the inversion layer of ultra-thin-oxide nMOSFET’s. IEEE Elec Dev Lett,1997, 18 (5): 20.
[58] Liao C C, Albert Chin, Tsai C. Electrical characterization of Al2O3 on Si from thermally oxidized AlAs and Al. J Crystal Growth, 1999, 201/202: 65.
[59] 邢溯.高介电常数材料的制备和电学性能的研究[博士学位论文].上海:中国科学院上海微系统与信息技术研究所,2002.
[60] G. D. Wilk, R. M. Wallace, J. M. Anthony, et al. Phys. 89(10), 5243(2001).
[61] 张 敏 , 丁士进 , 陈 玮 , 等 . 金属纳米晶快闪存储器研究进展 . 微电子学 , 2007,37(3):370-371.
[62] Lee J J, Harada Y, Pyun J W, et al. Nickel nanocrystal formation on HfO2 dielectric for nonvolatile memory device applications[J]. Appl Phys Lett, 2005, 86(10): 103505.
[63] Lee J J, Kwong D L. Metal nanocrystal memory with high-k tunneling barrier for improved data retention [J]. IEEE Trans Elec Dev, 2005, 52(4): 507-511.
[64] Tsoukalas D, Dimitrakis P, Kolliopoulou S, et al. Recent advances in nanoparticle memories [J]. Materials Science and Engineering B, 2005, 124: 93-101.
[65] Lee C, Gorur-Seetharam A, Kan E C. Operational and reliability comparison of discrete-storage nonvolatile memories: advantages of single- and double-layer metal nanocrystals [A]. Int Elec Dev Meet Tech Dig [C]. Washington D C, USA. 2003. 557-560.