被动雷达导引头数字信道化接收机研究及实现
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摘要
低截获概率(LPI)雷达及捷变频雷达的出现,给传统的被动雷达导引头接收机带来了极大的挑战。为了适应宽带信号的接收,使其具有对同时到达的多部雷达信号的处理能力,本课题围绕数字信道化接收机及其在被动雷达导引头中的应用展开研究。主要研究了数字信道化的高效结构、动态信道化接收技术以及信道化后续处理技术。以工程应用为背景,设计并实现了一套数字信道化接收机,并对其性能进行了测试及分析。
在均匀数字信道化方面,分析了复信号和实信号频带划分方式,并从滤波器组低通实现结构出发,推导了一种具有普遍性的多相滤波结构。针对不同的频带划分方式,分别推导并给出了复信号在不同条件下(临界抽取或非临界抽取、偶型排列或奇型排列)的各种信道化高效结构模型以及实信号对应不同频带划分下的信道化结构模型。在此基础上,提出了一种实信号无混叠无盲区的信道化高效结构和一种基于加权重叠相加结构的信道化高效结构,并对各信道化高效结构的运算量进行了对比分析。
针对数字信道化技术在被动雷达导引头中的应用,提出了一种提高信号分选通道灵敏度的数字信道化接收方案,同时为信号分选提供了新的分选参数(相位差信息)。讨论了实信号偶型排列信道化结构中信道0存在的仅有实部,而无虚部输出的问题,并提出了一种基于希尔伯特变换的I、Q信道产生方法,解决了信道0不能直接用于参数分析的问题。并对数字信道化高效结构的实现方法进行了研究。
在动态信道化接收方面,根据信号重构理论,推导了并给出了基于DFT滤波器组的高效动态信道化结构和基于WOLA的高效动态信道化结构。上述两种结构均可以实现非均匀信道划分,根据信道检测的结果实现动态信道化接收,解决了宽带信号跨信道的问题。
信道化后续处理方面,采用了CORDIC算法实现了信号包络和瞬时相位提取,并采用相位差分算法实现了频率测量。采用相位干涉仪测向原理,分别提取两路中频信号的瞬时相位并做差、解卷绕后得到相位差信息。针对均匀信道化子带信道带宽较宽,可能存在多信号问题,采用了FFT谱分析的方法对各子带信道进行谱分析,并对其FPGA实现的资源占用情况进行了评估。
在系统实现方面,采用了国家半导体公司的高速ADC08D1000和ALTERA公司的FPGA芯片设计并实现了一套数字信道化接收机。对系统各项功能和技术指标进行了详细测试,并对测试结果进行了分析,提出了一些改进意见。
LPI radar and frequency agility radar have brought a great challege for tranditonal receiver of passive radar seeker. In order to receive wideband signals and process multiple simultaneous signals, application of digital channelized receiver in passive radar seeker was studied in this dissertation. The efficient architectures of digital channelized receiver, dynamic channelized receiving technology and channelized subsequent processing technology were primarily researched. A set of digital channelized receiver was designed and realized based on engineering application and the performance of the digital channelized receiver was tested and analyzed.
In respect of uniform digital channelized, the frequency band division methods of complex signal and real signal were analyzed and an universal polyphase filter architecture was deduced form low pass filter architecture. According to different frequency band divisions, the various complex signal efficient channelized architectures and real signal efficient channelized architectures were given in different conditions that are critical decimation or non-critical decimation, even alignment or odd alignment. A real signal efficient channelized architecture based on non-aliasing and non-blind area and an efficient channelized architecture based on WOLA were proposed. The calculations of various efficient channelized architectures were compared and analyzed.
A digital channelized receiving method, which improved sensitivity of signal sorting channel and provided new sorting parameter, was proposed according to digital channelized application in passive radar seeker. A problem that the outputs of 0th channel have real part and have not image part in real signal even alignment architecture was discussed. A kind of I and Q channels generation method based on Hilbert transform was proposed in order to realize parameter analysis of 0th channel. The implementation method of digital channelized efficient architecture was studied.
In respect of dynamic channelized receiving, the efficient dynamic channelized architectures based on DFT and based on WOLA were deduced based on signal reconstruction theory. The two architectures can realize non-uniform channel division and dynamic channelized receiving by estimation of channel to solve the cross-channels problem for wide band signals.
In respect of channelized subsequent processing, the CORDIC algorithm was adopted to extract signal envelope and instantaneous phase and the phase difference algorithm was adopted to realize frequency measurement. The phase difference was gotten by instantaneous phases subtracting of two intermediate frequency signals and phase-unwrapping. As sub-channels were wide, it is possible to exist multiple signals in sub-channels. The method of FFT spectral analysis was adopted and the resource occupying of FPGA was evaluated.
In respect of system implementation, the high-speed ADC08D1000 of National Semiconductor and the FPGA of ALTERA were adopted to realize a set of digital channelized receiver. The various functions and technical specifications were tested and analyzed in detail and some improved suggestions were proposed.
在均匀数字信道化方面,分析了复信号和实信号频带划分方式,并从滤波器组低通实现结构出发,推导了一种具有普遍性的多相滤波结构。针对不同的频带划分方式,分别推导并给出了复信号在不同条件下(临界抽取或非临界抽取、偶型排列或奇型排列)的各种信道化高效结构模型以及实信号对应不同频带划分下的信道化结构模型。在此基础上,提出了一种实信号无混叠无盲区的信道化高效结构和一种基于加权重叠相加结构的信道化高效结构,并对各信道化高效结构的运算量进行了对比分析。
针对数字信道化技术在被动雷达导引头中的应用,提出了一种提高信号分选通道灵敏度的数字信道化接收方案,同时为信号分选提供了新的分选参数(相位差信息)。讨论了实信号偶型排列信道化结构中信道0存在的仅有实部,而无虚部输出的问题,并提出了一种基于希尔伯特变换的I、Q信道产生方法,解决了信道0不能直接用于参数分析的问题。并对数字信道化高效结构的实现方法进行了研究。
在动态信道化接收方面,根据信号重构理论,推导了并给出了基于DFT滤波器组的高效动态信道化结构和基于WOLA的高效动态信道化结构。上述两种结构均可以实现非均匀信道划分,根据信道检测的结果实现动态信道化接收,解决了宽带信号跨信道的问题。
信道化后续处理方面,采用了CORDIC算法实现了信号包络和瞬时相位提取,并采用相位差分算法实现了频率测量。采用相位干涉仪测向原理,分别提取两路中频信号的瞬时相位并做差、解卷绕后得到相位差信息。针对均匀信道化子带信道带宽较宽,可能存在多信号问题,采用了FFT谱分析的方法对各子带信道进行谱分析,并对其FPGA实现的资源占用情况进行了评估。
在系统实现方面,采用了国家半导体公司的高速ADC08D1000和ALTERA公司的FPGA芯片设计并实现了一套数字信道化接收机。对系统各项功能和技术指标进行了详细测试,并对测试结果进行了分析,提出了一些改进意见。
LPI radar and frequency agility radar have brought a great challege for tranditonal receiver of passive radar seeker. In order to receive wideband signals and process multiple simultaneous signals, application of digital channelized receiver in passive radar seeker was studied in this dissertation. The efficient architectures of digital channelized receiver, dynamic channelized receiving technology and channelized subsequent processing technology were primarily researched. A set of digital channelized receiver was designed and realized based on engineering application and the performance of the digital channelized receiver was tested and analyzed.
In respect of uniform digital channelized, the frequency band division methods of complex signal and real signal were analyzed and an universal polyphase filter architecture was deduced form low pass filter architecture. According to different frequency band divisions, the various complex signal efficient channelized architectures and real signal efficient channelized architectures were given in different conditions that are critical decimation or non-critical decimation, even alignment or odd alignment. A real signal efficient channelized architecture based on non-aliasing and non-blind area and an efficient channelized architecture based on WOLA were proposed. The calculations of various efficient channelized architectures were compared and analyzed.
A digital channelized receiving method, which improved sensitivity of signal sorting channel and provided new sorting parameter, was proposed according to digital channelized application in passive radar seeker. A problem that the outputs of 0th channel have real part and have not image part in real signal even alignment architecture was discussed. A kind of I and Q channels generation method based on Hilbert transform was proposed in order to realize parameter analysis of 0th channel. The implementation method of digital channelized efficient architecture was studied.
In respect of dynamic channelized receiving, the efficient dynamic channelized architectures based on DFT and based on WOLA were deduced based on signal reconstruction theory. The two architectures can realize non-uniform channel division and dynamic channelized receiving by estimation of channel to solve the cross-channels problem for wide band signals.
In respect of channelized subsequent processing, the CORDIC algorithm was adopted to extract signal envelope and instantaneous phase and the phase difference algorithm was adopted to realize frequency measurement. The phase difference was gotten by instantaneous phases subtracting of two intermediate frequency signals and phase-unwrapping. As sub-channels were wide, it is possible to exist multiple signals in sub-channels. The method of FFT spectral analysis was adopted and the resource occupying of FPGA was evaluated.
In respect of system implementation, the high-speed ADC08D1000 of National Semiconductor and the FPGA of ALTERA were adopted to realize a set of digital channelized receiver. The various functions and technical specifications were tested and analyzed in detail and some improved suggestions were proposed.
引文
[1]赵健民.宽带(2-18GHz)导引头关键技术研究[M].中国船舶工业总公司,1996：1-26页
[2]James Tsui.宽带数字接收机[M].北京：电子工业出版社,2002：7-12页
[3]曲志昱,司锡才,谢纪岭.相干源诱偏下比相被动雷达导引头测角性能分析[J].系统工程与电子技术,2008,30(5)：824-827页
[4]王喜焱,刘静,付伟.反辐射武器的技术特点及对抗措施[J].情报指挥控制系统与仿真技术,2002,5：15-19页
[5]毕大平,董晖,姜秋喜.雷达对抗侦察宽带数字接收机[J].航天电子对抗,2004,(6)：6-10页
[6]Baoguang Yan, Jin Qin, Jun Dai, Qingguo Fan, Bernstein, J.B. Reliability Simulation and Design Consideration of High Speed ADC Circuits[C]. Integrated Reliability Workshop Final Report,2008. IRW 2008. IEEE International,2008:125-128P
[7]Zheng Shenghua, Xu Dazhuang, Jin Xueming. ADC limitations on dynamic range of a digital receiver[C].IEEE symposium on Microwave, Antenna, Propagation and EMC Technologies,2005:79-83P
[8]Robert H. Walden. Analog-to-digital converters[J].IEEE signal processing magazine,2005,22(12):69-77P
[9]王洪.宽带数字接收机关键技术研究及系统实现[D].成都：电子科技大学博士论文,2007：3-5页
[10]A. Montijo, K. Rush. Accuracy in interleaved ADC systems[J]. Hewlett-Packard J,1993:36-42P
[11]Mark Looney. Advanced digital post-processing techniques enhance performance in time-interleaved ADC systems[J], Analog Dialogue, August 2003,37(8):1-5P
[12]何伟.新型宽带数字接收机[D].成都：电子科技大学博士论文,2004： 14-15页
[13]J.Lillington. Comparison of wideband channelization architectures[C]. International signal processing conference, Dallas,2003:1-6P
[14]Zahirniak D R, Sharpin D L, Fields T W. A hardware-efficient, multirate, digital channelized receiver architecture [J]. IEEE Transactions on aerospace and electronic systems,1998,34(1):137-147P
[15]Vogel C, Johansson H. Time-interleaved analog-to-digital converters:status and future directions[C].Circuits and Systems,2006. ISCAS 2006. Proceedings.2006 IEEE International Symposium on,2006:3383-3389P
[16]Goodman J, Miller B, Herman M, Raz G. Jackson, J. Polyphase Nonlinear Equalization of Time-Interleaved Analog-to-Digital Converters [J]. Selected Topics in Signal Processing,2009,3(3):362-373P
[17]Xu Shichao, Gao Meiguo, Liu Guoman. Design and implementation of an improved channelized architechture[C].Computer Science and Information Technology,2009. ICCSIT 2009.2nd IEEE International Conference on, 2009:412-416P
[18]张嵘.宽带高灵敏度数字接收机[D].成都：电子科技大学博士论文,2002：6-13页
[19]董晖,顾善秋.电子战接收机的发展历程及其面临的挑战[J].电子对抗,2006(5)：43-47页
[20]Grajal, Blazquez J, Lopez R, Sanz G, Burgos J M. Analysis and characterization of a monobit receiver for electronic warfare[J]. Aerospace and Electronic Systems, IEEE Transactions on,2003,39(1):244-258P
[21]George K, Chen C.H, Tsui J.B.Y. Extension of Two-Signal Spurious-Free Dynamic Range of Wideband Digital Receivers Using Kaiser Window and Compensation Method[J], Microwave Theory and Techniques, IEEE Transactions on,2007,55(4):788-794P
[22]Deepnarayan Gupta, Timur V, Filippov. Digital Channelizing Radio Frequency Receiver[J]. IEEE Trans. on applied superconductivity,2007,17 (2):430-437P
[23]A. Kirichenko, S. Sarwana, D. Gupta, and D. Yohannes. Superconductor digital receiver components[J], IEEE Trans. Appl. Supercond., June 2005, vol.15:249-254P
[24]JACK BROWNE. Digital Receiver Processes 3 GHz[J], Microwaves & RF, 2004,Vol.43:9-10P
[25]http//www.transtech.com
[26]http//www. pentek.com
[27]http//www.vmetro.com
[28]http//www.rfel.com
[29]郑立岗.数字接收机若干技术研究及系统实现[D].成都：电子科技大学博士论文,2004：4-10页
[30]杨小牛,楼才义,徐建良.软件无线电原理与应用[M].北京：电子工业出版社,2001：68-74页
[31]Fredric J H, chris D, Michael R. Digital receivers and transmitters using polyphase filter banks for wireless communications. IEEE Transactions on microwave theory and techniques.2003,51(4):1395-1411P
[32]吕幼新,郑立岗,王丽华.基于多相滤波的宽带接收机技术[J].电子科技大学学报,2003,32(2)：133-136页
[33]Lillington J. Comparison of wideband channelisation architectures[C]. International signal processing conference, Dallas,2003:1-6P
[34]蒋宗明,唐斌,吴伟.基于DFT滤波器组的多信号高效数字下变频[J].电子科技大学学报,2005,34(6)：743-746页
[35]Won Namgoong. Channelized Digital Receiver for Impulse Radio[C]. IEEE Conference on Communication,2003,4:2884-2888
[36]周欣,吴瑛.一种基于多相滤波的高效信道化算法研究及改进[J].信号处理,2008,24(1)：45-48页
[37]Zahirniak D R, Sharpin D L, Fields T W. A hardware-efficient, multirate, digital channelized receiver architecture[J]. IEEE Transactions on aerospace and electronic systems,1998,34(1):137-147P
[38]杨静.信道化数字接收机技术的研究[D].成都：电子科技大学硕士论文,2006：16-27页
[39]Harris F.J, Dick C, Rice M. Digital receivers and transmitters using polyphase filter banks for wireless communications[J]. Microwave Theory and Techniques, IEEE Transactions on,2003,54(2):1395-1412P
[40]周欣,吴瑛.一种基于多相滤波的高效信道化算法研究及改进[J].信号处理,2008,24(1)：45-48页
[41]张文旭,司锡才,孙强毅.一种高效信道化接收机设计与实现[J].电子技术应用,2008,34(11)：48-50页
[42]Hong Wang, Youxin Lu, Xuegang Wang. Channelized Receiver with WOLA Filterbank[C]. Radar,2006. CIE'06. International Conference on,16-19 Oct. 2006:1-3P
[43]王洪,吕幼新,汪学刚.WOLA滤波器组信道化接收机技术[J].电子科技大学学报,2008,37(1)：43-46页
[44]Vicen-Bueno R, Martinez-Leira A, Gil-Pita R, Rosa-Zurera M. Modified LMS-Based Feedback-Reduction Subsystems in Digital Hearing Aids Based on WOLA Filter Bank[J]. Instrumentation and Measurement, IEEE Transactions on,2009,58(9):3177-3190P
[45]Sheikhzadeh H, Brennan R.L, So S. Cardiac Rhythm Detection and Classification by WOLA Filterbank Analysis of EGM Signals[C]. Engineering in Medicine and Biology Society,2006. EMBS'06.28th Annual International Conference of the IEEE,2006:1402-1405P
[46]Brennan R.L, Abutalebi R, Sheikhzadeh H. Adaptive filtering using a highly oversampled weighted overlap-add filterbank in an ultra low-power system[C].Signals, Systems and Computers,2002. Conference Record of the Thirty-Sixth Asilomar Conference on,2002,1:806-810P
[47]杨静,吕幼新.高效数字信道化IFM接收机的研究[J].电子科技大学学报,2005,34(4)：444-447页
[48]Fields T W, Sharpin D L, Tsui J B. Digital channelized IFM receiver[J].IEEE MTT-S International,1994,3(1):667-670P
[49]Gruciiala H, Slowik A.The complex signals instantaneous frequency measurement using multichannel IFM systems[C]. Microwaves, Radar and Wireless Communications,2004. MIKON-2004.15th International Conference on,2004,1:210-213P
[50]Lee Y.H.G, Helton J, Chen C.I.H. Real-time FPGA-based implementation of digital instantaneous frequency measurement receiver[C]. Circuits and Systems,2008. ISCAS 2008. IEEE International Symposium on,2008:2494-2497P
[51]Helton J, Chen C.I.H, Lin D.M, Tsui J.B.Y. FPGA-Based 1.2 GHz Bandwidth Digital Instantaneous Frequency Measurement Receiver[C]. Quality Electronic Design,2008. ISQED 2008.9th International Symposium on,2008:568-571P
[52]司锡才,赵建民.宽频带反辐射导弹导引头技术基础[M].哈尔滨：哈尔滨工程大学出版社,1996：106-110页
[53]Yaoying Lin, Hans V. Application of Undersampled Hilbert Transform to Complex Modulated Signals[C]. Instrumentation and Measurement Technology Conference,2006. IMTC 2006. Proceedings of the IEEE. 2006:879-882P
[54]Hongli Shi; Bo Hu; Jian Qiu Zhang.A Novel Scheme for the Design of Approximate Hilbert Transform Pairs of Orthonormal Wavelet Bases[J]. Signal Processing, IEEE Transactions on.2008,56(6):2289-2297P
[55]辛渊博,侯宏.基于FPGA的数字信道化接收机的研究及实现[J].电子技术应用,2009,(5)：163-165页
[56]马爽,徐欣.基于FPGA的高速A/D转换芯片ADC08D1000应用[J].现代电子技术,2009,32(14)：44-47页
[57]范红旗,翟庆林,王胜.基于IP核的锐截止中频采样滤波器优化设计[J].电子测量与仪器学报,2008,22(1)：99-103页
[58]王紫婷,郭海丽.基于Matlab/Simulink的数字滤波器IP核的设计与实现 [J].兰州交通大学学报,2008,27(3)：111-113页
[59]徐娜,杨鼎才.基于FPGA的高速定点FFT算法的实现[J].现代电子技术,2009,32(12)：106-107页
[60]刘红侠,杨靓,黄巾,黄士坦.可变长FFT并行旋转因子高效产生算法及实现[J].西安电子科技大学学报,2009,36(3)：541-546页
[61]刘红侠,杨靓,黄巾,黄士坦.流水并行1-D FFT地址映射算法[J].武汉大学学报,2008,41(3)：123-127页
[62]王钢,刘静森,赵洪林.基于多相滤波结构的侦察接收机中频处理电路[J].哈尔滨工业大学学报,2006,38(9)：1410-1412页
[63]龙慧敏.超宽带线性调频信号的信道化接收技术研究[D].成都：电子科技大学硕士论文,2006：67-75页
[64]董晖,姜秋喜.数字信道化接收机信号处理技术[J].电子信息对抗技术,2007,22(2)：3-6页
[65]印茂伟.宽带相位编码信号数字信道化接收与实现技术研究[D].成都：电子科技大学硕士论文,2007：46-56页
[66]李冰,郑瑾,葛临东.基于NPR调制滤波器组的动态信道化滤波[J].电子学报,2007,35(6)：1178-1182页
[67]Abu-Al-Saud W A, Studer G L. Efficient wideband channelizer for software radio systems using modulated pr filterbanks[J]. IEEE Trans Signal Processing, 2004,52(10):2807-2820P
[68]Zhang G, McGee W.F. Perfect reconstruction analysis/synthesis systems based on the FIFB filter banks[J].Circuits and Systems,1992, Proceedings of the 35th Midwest Symposium on.1992,2:1061-1064P
[69]Tran T.D. M-channel linear phase perfect reconstruction filter bank with rational coefficients [J]. Circuits and Systems I:Fundamental Theory and Applications, IEEE Transactions on.2002,49(7):914-927P
[70]Zhiming Xu3 Makur A. Theory, Lattice Structure and Design of Unequal Length Linear Phase Perfect Reconstruction Filter Banks with More Flexible Length Profile[C].Circuits and Systems,2006. APCCAS 2006. IEEE Asia Pacific Conference on.2006:752-755P
[71]Lowenborg P, Johansson H, Wanhammar L. Two-channel digital and hybrid analog/digital multirate filter banks with very low-complexity analysis or synthesis filters[J]. Circuits and Systems II:Analog and Digital Signal Processing, IEEE Transactions on.2003,50(7):355-367P
[72]Saghizadeh P, Willson A.N. A new approach to the design of critically sampled M-channel uniform-band perfect-reconstruction linear-phase FIR filter banks[J]. Signal Processing, IEEE Transactions on.1998,46(6):1544-1557P
[73]陶然,张惠云,王越编著.多抽样率数字信号处理理论及其应用[M],北京：清华大学出版社,2007：122-136页
[74]朱晓,司锡才.一种高效动态数字信道化方法[J].哈尔滨工业大学学报,2009,41(7)：160-164页
[75]D. Rabinkin and N. Pulsone.Subband-domain signal processing for radar array systems[C]. Proc. SPIE, Denver, Colorado,1999,38:174-187P
[76]Daniel Rabinkin, Truong Nguyen. Optimum subband filterbank design for radar array signal processing with pulse compression[C]. Sensor Array and Multichannel Signal Processing Workshop Proceedings, Cambridge,USA, 2000:315-321P
[77]李冰,郑瑾,葛临东.基于非均匀滤波器组的动态信道化滤波[J].电子与信息学报,2007,29(10)：2396-2400页
[78]Durak L, Arikan O. Short-time Fourier transform:two fundamental properties and an optimal implementation[J]. Signal Processing, IEEE Transactions on.2003,51(5):1231-1242P
[79]Portnoff M. Time-frequency representation of digital signals and systems based on short-time Fourier analysis [J], IEEE Transactions on Acoustics, Speech, and Signal Processing,1998,28(1):55-69P
[80]Xie X M, Chan S C and Yuk T I. A class of biorthogonal nonuniform cosine-modulated filter banks with lower system delay[C]. IEEE ISCAS.Sydney,2001:25-28P
[81]J.E.volder. The CORDIC Trigonometrie ComPuting Teehnique[J]. IRE Transactions on Computers,1959,8:330-334P
[82]J.Walter. A Unified Algorithm for Elementary Function[C]. Spring Joint Computer Conference,1971:379-385P
[83]Cheng-Shing Wu, An-Yeu Wu, Chih-Hsiu Lin. A high-performance /low-latency vector rotational CORDIC architecture based on extended elementary angle set and trellis-based searching schemes[J]. Circuits and Systems Ⅱ:Analog and Digital Signal Processing, IEEE Transactions on. 2003,50(9):589-601P
[84]Jie Zhou, Yong Dou, Yuanwu Lei, Jinbo Xu, Yazhuo Dong. Double Precision Hybrid-Mode Floating-Point FPGA CORDIC Co-processor[C]. High Performance Computing and Communications,2008. HPCC'08.10th IEEE International Conference on.2008:182-189P
[85]李全,李晓欢,陈石平.基于CORDIC算法的高精度浮点超越函数的FPGA实现[J].电子技术应用,2009,5：166-170页
[86]Sung T.Y, Hsin H.C. Design and simulation of reusable IP CORDIC core for special-purpose processors [J].Computers & Digital Techniques, IET.2007, 1(5):581-589P
[87]Chang Yong Kang, Swartzlander E.E.Jr. An analysis of the CORDIC algorithm for direct digital frequency synthesis[C]. Application-Specific Systems, Architectures and Processors,2002. Proceedings. The IEEE International Conference on.2002:111-119P
[88]郑立岗,吕幼新,向敬成等.一种基于CORDIC算法的数字鉴频方法[J].信号处理,2003,1：6-10页
[89]王鑫,戎建刚,赵春晖.一种用于信道化接收机的相位差分算法[J].航天电子对抗,2007,23(6)：49-52页
[90]O'Donnell T.H, Yaghjian A.D, Altshuler E.E. Frequency optimization of parasitic superdirective two element arrays[J]. Antennas and Propagation International Symposium,2007:3932-3935P
[91]宋云朝,万群,毛祺,刘刚.一种稳健的基于解卷叠的相位差分瞬时测频方法[J].电子信息对抗技术,2008,23(4)：12-15页
[92]张文旭,司锡才,蒋伊琳.相位干涉仪测向系统相位误差研究[J].系统工程与电子技术,2006,28(11)：1631-1633页
[93]Sansaloni T, Perez-Pascual A, Torres V, Almenar V, Toledo J.F, Valls J. FFT Spectrum Analyzer Project for Teaching Digital Signal Processing With FPGA Devices[J]. Education, IEEE Transactions on.2007,50(3):229-235P
[94]石远东.宽带数字接收机信道化及其相关技术的研究与实现[D].南京：南京航空航天大学,2006：31-44页
[95]Hongjiang He, Hui Guo. The Realization of FFT Algorithm Based on FPGA Co-Processor[C]. Intelligent Information Technology Application,2008. IITA'08. Second International Symposium on.2008,3:239-243P
[96]Hemmert K.S, Underwood K.D. An analysis of the double-precision floating-point FFT on FPGAs[C]. Field-Programmable Custom Computing Machines,2005. FCCM 2005.13th Annual IEEE Symposium on.2005:171-180P
[97]Uzun I.S, Amira A, Bouridane A. FPGA implementations of fast Fourier transforms for real-time signal and image processing[J]. Vision, Image and Signal Processing, IEE Proceedings.2005,152(3):283-296P
[98]Chandrakanth V, Nasir W, Jena P, Kuloor R. Novel architecture for hardware efficient FPGA implementation of real time configurable "variable point FFT" using NIOS ⅡTM[C]. Radar Conference,2009 IEEE.2009:1-4P
[99]Lo Sing Cheng, Miri A, Tet Hin Yeap. Efficient FPGA implementation of FFT based multipliers[C]. Electrical and Computer Engineering,2005. Canadian Conference on.2005:1300-1303P
[100]Wei Han, Erdogan A.T, Arslan T, Hasan M. The development of high performance FFT IP cores through hybrid low power algorithmic methodology[C]. Design Automation Conference,2005. Proceedings of the ASP-DAC 2005. Asia and South Pacific.2005,1:549-552P
[101]Melnyk A, Dunets B. FFT Processor IP Cores synthesis on the base of configurable pipeline architecture[C]. CAD Systems in Microelectronics, 2003. CADSM 2003. Proceedings of the 7th International Conference. 2003:211-213P
[102]马壮,齐林,马鹏阁,司巍.基于FPGA IP核的FFT实现[J].现代电子技术,2009,32(7)：160-162页
[103]姜冬梅.雷达信号数字侦察接收的FPGA实现[D].成都：电子科技大学硕士论文,2008：26-42页
[104]http//www.altera.com.cn
[105]沈伟,文必洋,马志刚,王才‘军,严卫东.基于ADF4360-7的宽带雷达信号源设计[J].现代雷达,2006,28(8)：39-42页
[106]Bratov V, Binkley J, Katzman V, Choma J. Architecture and Implementation of a Low-Power LVDS Output Buffer for High-Speed Applications[J]. Circuits and Systems I:Regular Papers, IEEE Transactions on.2006,53(10):2101-2108P
[107]Hwang-Cherng Chow, Wen-Wann Sheen. Low power LVDS circuit for serial data communications[C]. Intelligent Signal Processing and Communication Systems,2005. ISPACS 2005. Proceedings of 2005 International Symposium on.2005:293-296P
[108]黄晓红,蔡江利.基于FPGA的改进型FIR滤波器的实现[J].电子技术应用,2009,5：32-34页
[109]魏灵,杨日杰,崔旭涛.基于分布式算法的数字滤波器设计[J].仪器仪表学报,2008,29(10)：2100-2104页
[110]Chih-Peng Fan, Mau-Shih Lee, Guo-An Su. A Low Multiplier and Multiplication Costs 256-point FFT Implementation with Simplified Radix-24 SDF Architecture[C]. Circuits and Systems,2006. APCCAS 2006. IEEE Asia Pacific Conference on.2006:1935-1938P
[111]齐华,李勇,郝重阳.一种块递推实时FFT算法模块设计与实现[J].西北工业大学学报,2009,27(2)：240-243页
[112]Lopez-Risueno G, Grajal J, Sanz-Osorio A. Digital channelized receiver based on time-frequency analysis for signal interception[J]. Aerospace and Electronic Systems, IEEE Transactions on,2005,41(3):879-898P
[113]王森.宽带数字信道化接收机FPGA实现技术研究[D].成都：电子科技大学硕士论文,2008：26-60页
[114]吴伟.通带匹配数字侦察接收技术研究[D].成都：电子科技大学博士论文,2007：99-108页
[115]王顺.基于FPGA的宽频带数字接收机设计[D].北京：中国地质大学硕士论文,2008：57-61页
[116]董骞.基于软件无线电的SAR数字接收机研究[D].北京：中国科学院研究生院博士论文,2007：22-89页
[2]James Tsui.宽带数字接收机[M].北京：电子工业出版社,2002：7-12页
[3]曲志昱,司锡才,谢纪岭.相干源诱偏下比相被动雷达导引头测角性能分析[J].系统工程与电子技术,2008,30(5)：824-827页
[4]王喜焱,刘静,付伟.反辐射武器的技术特点及对抗措施[J].情报指挥控制系统与仿真技术,2002,5：15-19页
[5]毕大平,董晖,姜秋喜.雷达对抗侦察宽带数字接收机[J].航天电子对抗,2004,(6)：6-10页
[6]Baoguang Yan, Jin Qin, Jun Dai, Qingguo Fan, Bernstein, J.B. Reliability Simulation and Design Consideration of High Speed ADC Circuits[C]. Integrated Reliability Workshop Final Report,2008. IRW 2008. IEEE International,2008:125-128P
[7]Zheng Shenghua, Xu Dazhuang, Jin Xueming. ADC limitations on dynamic range of a digital receiver[C].IEEE symposium on Microwave, Antenna, Propagation and EMC Technologies,2005:79-83P
[8]Robert H. Walden. Analog-to-digital converters[J].IEEE signal processing magazine,2005,22(12):69-77P
[9]王洪.宽带数字接收机关键技术研究及系统实现[D].成都：电子科技大学博士论文,2007：3-5页
[10]A. Montijo, K. Rush. Accuracy in interleaved ADC systems[J]. Hewlett-Packard J,1993:36-42P
[11]Mark Looney. Advanced digital post-processing techniques enhance performance in time-interleaved ADC systems[J], Analog Dialogue, August 2003,37(8):1-5P
[12]何伟.新型宽带数字接收机[D].成都：电子科技大学博士论文,2004： 14-15页
[13]J.Lillington. Comparison of wideband channelization architectures[C]. International signal processing conference, Dallas,2003:1-6P
[14]Zahirniak D R, Sharpin D L, Fields T W. A hardware-efficient, multirate, digital channelized receiver architecture [J]. IEEE Transactions on aerospace and electronic systems,1998,34(1):137-147P
[15]Vogel C, Johansson H. Time-interleaved analog-to-digital converters:status and future directions[C].Circuits and Systems,2006. ISCAS 2006. Proceedings.2006 IEEE International Symposium on,2006:3383-3389P
[16]Goodman J, Miller B, Herman M, Raz G. Jackson, J. Polyphase Nonlinear Equalization of Time-Interleaved Analog-to-Digital Converters [J]. Selected Topics in Signal Processing,2009,3(3):362-373P
[17]Xu Shichao, Gao Meiguo, Liu Guoman. Design and implementation of an improved channelized architechture[C].Computer Science and Information Technology,2009. ICCSIT 2009.2nd IEEE International Conference on, 2009:412-416P
[18]张嵘.宽带高灵敏度数字接收机[D].成都：电子科技大学博士论文,2002：6-13页
[19]董晖,顾善秋.电子战接收机的发展历程及其面临的挑战[J].电子对抗,2006(5)：43-47页
[20]Grajal, Blazquez J, Lopez R, Sanz G, Burgos J M. Analysis and characterization of a monobit receiver for electronic warfare[J]. Aerospace and Electronic Systems, IEEE Transactions on,2003,39(1):244-258P
[21]George K, Chen C.H, Tsui J.B.Y. Extension of Two-Signal Spurious-Free Dynamic Range of Wideband Digital Receivers Using Kaiser Window and Compensation Method[J], Microwave Theory and Techniques, IEEE Transactions on,2007,55(4):788-794P
[22]Deepnarayan Gupta, Timur V, Filippov. Digital Channelizing Radio Frequency Receiver[J]. IEEE Trans. on applied superconductivity,2007,17 (2):430-437P
[23]A. Kirichenko, S. Sarwana, D. Gupta, and D. Yohannes. Superconductor digital receiver components[J], IEEE Trans. Appl. Supercond., June 2005, vol.15:249-254P
[24]JACK BROWNE. Digital Receiver Processes 3 GHz[J], Microwaves & RF, 2004,Vol.43:9-10P
[25]http//www.transtech.com
[26]http//www. pentek.com
[27]http//www.vmetro.com
[28]http//www.rfel.com
[29]郑立岗.数字接收机若干技术研究及系统实现[D].成都：电子科技大学博士论文,2004：4-10页
[30]杨小牛,楼才义,徐建良.软件无线电原理与应用[M].北京：电子工业出版社,2001：68-74页
[31]Fredric J H, chris D, Michael R. Digital receivers and transmitters using polyphase filter banks for wireless communications. IEEE Transactions on microwave theory and techniques.2003,51(4):1395-1411P
[32]吕幼新,郑立岗,王丽华.基于多相滤波的宽带接收机技术[J].电子科技大学学报,2003,32(2)：133-136页
[33]Lillington J. Comparison of wideband channelisation architectures[C]. International signal processing conference, Dallas,2003:1-6P
[34]蒋宗明,唐斌,吴伟.基于DFT滤波器组的多信号高效数字下变频[J].电子科技大学学报,2005,34(6)：743-746页
[35]Won Namgoong. Channelized Digital Receiver for Impulse Radio[C]. IEEE Conference on Communication,2003,4:2884-2888
[36]周欣,吴瑛.一种基于多相滤波的高效信道化算法研究及改进[J].信号处理,2008,24(1)：45-48页
[37]Zahirniak D R, Sharpin D L, Fields T W. A hardware-efficient, multirate, digital channelized receiver architecture[J]. IEEE Transactions on aerospace and electronic systems,1998,34(1):137-147P
[38]杨静.信道化数字接收机技术的研究[D].成都：电子科技大学硕士论文,2006：16-27页
[39]Harris F.J, Dick C, Rice M. Digital receivers and transmitters using polyphase filter banks for wireless communications[J]. Microwave Theory and Techniques, IEEE Transactions on,2003,54(2):1395-1412P
[40]周欣,吴瑛.一种基于多相滤波的高效信道化算法研究及改进[J].信号处理,2008,24(1)：45-48页
[41]张文旭,司锡才,孙强毅.一种高效信道化接收机设计与实现[J].电子技术应用,2008,34(11)：48-50页
[42]Hong Wang, Youxin Lu, Xuegang Wang. Channelized Receiver with WOLA Filterbank[C]. Radar,2006. CIE'06. International Conference on,16-19 Oct. 2006:1-3P
[43]王洪,吕幼新,汪学刚.WOLA滤波器组信道化接收机技术[J].电子科技大学学报,2008,37(1)：43-46页
[44]Vicen-Bueno R, Martinez-Leira A, Gil-Pita R, Rosa-Zurera M. Modified LMS-Based Feedback-Reduction Subsystems in Digital Hearing Aids Based on WOLA Filter Bank[J]. Instrumentation and Measurement, IEEE Transactions on,2009,58(9):3177-3190P
[45]Sheikhzadeh H, Brennan R.L, So S. Cardiac Rhythm Detection and Classification by WOLA Filterbank Analysis of EGM Signals[C]. Engineering in Medicine and Biology Society,2006. EMBS'06.28th Annual International Conference of the IEEE,2006:1402-1405P
[46]Brennan R.L, Abutalebi R, Sheikhzadeh H. Adaptive filtering using a highly oversampled weighted overlap-add filterbank in an ultra low-power system[C].Signals, Systems and Computers,2002. Conference Record of the Thirty-Sixth Asilomar Conference on,2002,1:806-810P
[47]杨静,吕幼新.高效数字信道化IFM接收机的研究[J].电子科技大学学报,2005,34(4)：444-447页
[48]Fields T W, Sharpin D L, Tsui J B. Digital channelized IFM receiver[J].IEEE MTT-S International,1994,3(1):667-670P
[49]Gruciiala H, Slowik A.The complex signals instantaneous frequency measurement using multichannel IFM systems[C]. Microwaves, Radar and Wireless Communications,2004. MIKON-2004.15th International Conference on,2004,1:210-213P
[50]Lee Y.H.G, Helton J, Chen C.I.H. Real-time FPGA-based implementation of digital instantaneous frequency measurement receiver[C]. Circuits and Systems,2008. ISCAS 2008. IEEE International Symposium on,2008:2494-2497P
[51]Helton J, Chen C.I.H, Lin D.M, Tsui J.B.Y. FPGA-Based 1.2 GHz Bandwidth Digital Instantaneous Frequency Measurement Receiver[C]. Quality Electronic Design,2008. ISQED 2008.9th International Symposium on,2008:568-571P
[52]司锡才,赵建民.宽频带反辐射导弹导引头技术基础[M].哈尔滨：哈尔滨工程大学出版社,1996：106-110页
[53]Yaoying Lin, Hans V. Application of Undersampled Hilbert Transform to Complex Modulated Signals[C]. Instrumentation and Measurement Technology Conference,2006. IMTC 2006. Proceedings of the IEEE. 2006:879-882P
[54]Hongli Shi; Bo Hu; Jian Qiu Zhang.A Novel Scheme for the Design of Approximate Hilbert Transform Pairs of Orthonormal Wavelet Bases[J]. Signal Processing, IEEE Transactions on.2008,56(6):2289-2297P
[55]辛渊博,侯宏.基于FPGA的数字信道化接收机的研究及实现[J].电子技术应用,2009,(5)：163-165页
[56]马爽,徐欣.基于FPGA的高速A/D转换芯片ADC08D1000应用[J].现代电子技术,2009,32(14)：44-47页
[57]范红旗,翟庆林,王胜.基于IP核的锐截止中频采样滤波器优化设计[J].电子测量与仪器学报,2008,22(1)：99-103页
[58]王紫婷,郭海丽.基于Matlab/Simulink的数字滤波器IP核的设计与实现 [J].兰州交通大学学报,2008,27(3)：111-113页
[59]徐娜,杨鼎才.基于FPGA的高速定点FFT算法的实现[J].现代电子技术,2009,32(12)：106-107页
[60]刘红侠,杨靓,黄巾,黄士坦.可变长FFT并行旋转因子高效产生算法及实现[J].西安电子科技大学学报,2009,36(3)：541-546页
[61]刘红侠,杨靓,黄巾,黄士坦.流水并行1-D FFT地址映射算法[J].武汉大学学报,2008,41(3)：123-127页
[62]王钢,刘静森,赵洪林.基于多相滤波结构的侦察接收机中频处理电路[J].哈尔滨工业大学学报,2006,38(9)：1410-1412页
[63]龙慧敏.超宽带线性调频信号的信道化接收技术研究[D].成都：电子科技大学硕士论文,2006：67-75页
[64]董晖,姜秋喜.数字信道化接收机信号处理技术[J].电子信息对抗技术,2007,22(2)：3-6页
[65]印茂伟.宽带相位编码信号数字信道化接收与实现技术研究[D].成都：电子科技大学硕士论文,2007：46-56页
[66]李冰,郑瑾,葛临东.基于NPR调制滤波器组的动态信道化滤波[J].电子学报,2007,35(6)：1178-1182页
[67]Abu-Al-Saud W A, Studer G L. Efficient wideband channelizer for software radio systems using modulated pr filterbanks[J]. IEEE Trans Signal Processing, 2004,52(10):2807-2820P
[68]Zhang G, McGee W.F. Perfect reconstruction analysis/synthesis systems based on the FIFB filter banks[J].Circuits and Systems,1992, Proceedings of the 35th Midwest Symposium on.1992,2:1061-1064P
[69]Tran T.D. M-channel linear phase perfect reconstruction filter bank with rational coefficients [J]. Circuits and Systems I:Fundamental Theory and Applications, IEEE Transactions on.2002,49(7):914-927P
[70]Zhiming Xu3 Makur A. Theory, Lattice Structure and Design of Unequal Length Linear Phase Perfect Reconstruction Filter Banks with More Flexible Length Profile[C].Circuits and Systems,2006. APCCAS 2006. IEEE Asia Pacific Conference on.2006:752-755P
[71]Lowenborg P, Johansson H, Wanhammar L. Two-channel digital and hybrid analog/digital multirate filter banks with very low-complexity analysis or synthesis filters[J]. Circuits and Systems II:Analog and Digital Signal Processing, IEEE Transactions on.2003,50(7):355-367P
[72]Saghizadeh P, Willson A.N. A new approach to the design of critically sampled M-channel uniform-band perfect-reconstruction linear-phase FIR filter banks[J]. Signal Processing, IEEE Transactions on.1998,46(6):1544-1557P
[73]陶然,张惠云,王越编著.多抽样率数字信号处理理论及其应用[M],北京：清华大学出版社,2007：122-136页
[74]朱晓,司锡才.一种高效动态数字信道化方法[J].哈尔滨工业大学学报,2009,41(7)：160-164页
[75]D. Rabinkin and N. Pulsone.Subband-domain signal processing for radar array systems[C]. Proc. SPIE, Denver, Colorado,1999,38:174-187P
[76]Daniel Rabinkin, Truong Nguyen. Optimum subband filterbank design for radar array signal processing with pulse compression[C]. Sensor Array and Multichannel Signal Processing Workshop Proceedings, Cambridge,USA, 2000:315-321P
[77]李冰,郑瑾,葛临东.基于非均匀滤波器组的动态信道化滤波[J].电子与信息学报,2007,29(10)：2396-2400页
[78]Durak L, Arikan O. Short-time Fourier transform:two fundamental properties and an optimal implementation[J]. Signal Processing, IEEE Transactions on.2003,51(5):1231-1242P
[79]Portnoff M. Time-frequency representation of digital signals and systems based on short-time Fourier analysis [J], IEEE Transactions on Acoustics, Speech, and Signal Processing,1998,28(1):55-69P
[80]Xie X M, Chan S C and Yuk T I. A class of biorthogonal nonuniform cosine-modulated filter banks with lower system delay[C]. IEEE ISCAS.Sydney,2001:25-28P
[81]J.E.volder. The CORDIC Trigonometrie ComPuting Teehnique[J]. IRE Transactions on Computers,1959,8:330-334P
[82]J.Walter. A Unified Algorithm for Elementary Function[C]. Spring Joint Computer Conference,1971:379-385P
[83]Cheng-Shing Wu, An-Yeu Wu, Chih-Hsiu Lin. A high-performance /low-latency vector rotational CORDIC architecture based on extended elementary angle set and trellis-based searching schemes[J]. Circuits and Systems Ⅱ:Analog and Digital Signal Processing, IEEE Transactions on. 2003,50(9):589-601P
[84]Jie Zhou, Yong Dou, Yuanwu Lei, Jinbo Xu, Yazhuo Dong. Double Precision Hybrid-Mode Floating-Point FPGA CORDIC Co-processor[C]. High Performance Computing and Communications,2008. HPCC'08.10th IEEE International Conference on.2008:182-189P
[85]李全,李晓欢,陈石平.基于CORDIC算法的高精度浮点超越函数的FPGA实现[J].电子技术应用,2009,5：166-170页
[86]Sung T.Y, Hsin H.C. Design and simulation of reusable IP CORDIC core for special-purpose processors [J].Computers & Digital Techniques, IET.2007, 1(5):581-589P
[87]Chang Yong Kang, Swartzlander E.E.Jr. An analysis of the CORDIC algorithm for direct digital frequency synthesis[C]. Application-Specific Systems, Architectures and Processors,2002. Proceedings. The IEEE International Conference on.2002:111-119P
[88]郑立岗,吕幼新,向敬成等.一种基于CORDIC算法的数字鉴频方法[J].信号处理,2003,1：6-10页
[89]王鑫,戎建刚,赵春晖.一种用于信道化接收机的相位差分算法[J].航天电子对抗,2007,23(6)：49-52页
[90]O'Donnell T.H, Yaghjian A.D, Altshuler E.E. Frequency optimization of parasitic superdirective two element arrays[J]. Antennas and Propagation International Symposium,2007:3932-3935P
[91]宋云朝,万群,毛祺,刘刚.一种稳健的基于解卷叠的相位差分瞬时测频方法[J].电子信息对抗技术,2008,23(4)：12-15页
[92]张文旭,司锡才,蒋伊琳.相位干涉仪测向系统相位误差研究[J].系统工程与电子技术,2006,28(11)：1631-1633页
[93]Sansaloni T, Perez-Pascual A, Torres V, Almenar V, Toledo J.F, Valls J. FFT Spectrum Analyzer Project for Teaching Digital Signal Processing With FPGA Devices[J]. Education, IEEE Transactions on.2007,50(3):229-235P
[94]石远东.宽带数字接收机信道化及其相关技术的研究与实现[D].南京：南京航空航天大学,2006：31-44页
[95]Hongjiang He, Hui Guo. The Realization of FFT Algorithm Based on FPGA Co-Processor[C]. Intelligent Information Technology Application,2008. IITA'08. Second International Symposium on.2008,3:239-243P
[96]Hemmert K.S, Underwood K.D. An analysis of the double-precision floating-point FFT on FPGAs[C]. Field-Programmable Custom Computing Machines,2005. FCCM 2005.13th Annual IEEE Symposium on.2005:171-180P
[97]Uzun I.S, Amira A, Bouridane A. FPGA implementations of fast Fourier transforms for real-time signal and image processing[J]. Vision, Image and Signal Processing, IEE Proceedings.2005,152(3):283-296P
[98]Chandrakanth V, Nasir W, Jena P, Kuloor R. Novel architecture for hardware efficient FPGA implementation of real time configurable "variable point FFT" using NIOS ⅡTM[C]. Radar Conference,2009 IEEE.2009:1-4P
[99]Lo Sing Cheng, Miri A, Tet Hin Yeap. Efficient FPGA implementation of FFT based multipliers[C]. Electrical and Computer Engineering,2005. Canadian Conference on.2005:1300-1303P
[100]Wei Han, Erdogan A.T, Arslan T, Hasan M. The development of high performance FFT IP cores through hybrid low power algorithmic methodology[C]. Design Automation Conference,2005. Proceedings of the ASP-DAC 2005. Asia and South Pacific.2005,1:549-552P
[101]Melnyk A, Dunets B. FFT Processor IP Cores synthesis on the base of configurable pipeline architecture[C]. CAD Systems in Microelectronics, 2003. CADSM 2003. Proceedings of the 7th International Conference. 2003:211-213P
[102]马壮,齐林,马鹏阁,司巍.基于FPGA IP核的FFT实现[J].现代电子技术,2009,32(7)：160-162页
[103]姜冬梅.雷达信号数字侦察接收的FPGA实现[D].成都：电子科技大学硕士论文,2008：26-42页
[104]http//www.altera.com.cn
[105]沈伟,文必洋,马志刚,王才‘军,严卫东.基于ADF4360-7的宽带雷达信号源设计[J].现代雷达,2006,28(8)：39-42页
[106]Bratov V, Binkley J, Katzman V, Choma J. Architecture and Implementation of a Low-Power LVDS Output Buffer for High-Speed Applications[J]. Circuits and Systems I:Regular Papers, IEEE Transactions on.2006,53(10):2101-2108P
[107]Hwang-Cherng Chow, Wen-Wann Sheen. Low power LVDS circuit for serial data communications[C]. Intelligent Signal Processing and Communication Systems,2005. ISPACS 2005. Proceedings of 2005 International Symposium on.2005:293-296P
[108]黄晓红,蔡江利.基于FPGA的改进型FIR滤波器的实现[J].电子技术应用,2009,5：32-34页
[109]魏灵,杨日杰,崔旭涛.基于分布式算法的数字滤波器设计[J].仪器仪表学报,2008,29(10)：2100-2104页
[110]Chih-Peng Fan, Mau-Shih Lee, Guo-An Su. A Low Multiplier and Multiplication Costs 256-point FFT Implementation with Simplified Radix-24 SDF Architecture[C]. Circuits and Systems,2006. APCCAS 2006. IEEE Asia Pacific Conference on.2006:1935-1938P
[111]齐华,李勇,郝重阳.一种块递推实时FFT算法模块设计与实现[J].西北工业大学学报,2009,27(2)：240-243页
[112]Lopez-Risueno G, Grajal J, Sanz-Osorio A. Digital channelized receiver based on time-frequency analysis for signal interception[J]. Aerospace and Electronic Systems, IEEE Transactions on,2005,41(3):879-898P
[113]王森.宽带数字信道化接收机FPGA实现技术研究[D].成都：电子科技大学硕士论文,2008：26-60页
[114]吴伟.通带匹配数字侦察接收技术研究[D].成都：电子科技大学博士论文,2007：99-108页
[115]王顺.基于FPGA的宽频带数字接收机设计[D].北京：中国地质大学硕士论文,2008：57-61页
[116]董骞.基于软件无线电的SAR数字接收机研究[D].北京：中国科学院研究生院博士论文,2007：22-89页