SOI SiGe HBT性能与结构设计研究
摘要
绝缘体上硅(SO1)结构能够降低寄生电容、减小漏电流、提高抗衬底噪声和串扰能力,硅锗异质结晶体管(SiGe HBT)与Si兼容,速度快,成本低。因此将SiGe HBT与SOl技术,特别是薄膜SOI,结合起来,对于高速低功耗应用如无线通信等特别有吸引力。最新一代0.13μm毫米波SOI SiGe BiCMOS工艺中的纵向SOI SiGe HBT表现出了优越的电学性能,如更高的Early电压,集电结雪崩击穿电压与特征频率之间更好的折衷,抗辐射和噪声等等。由于SOI SiGe HBT的这些优势通过实验和仿真得到广泛的报道,对应的模型需要深入研究。这篇论文的目的在于表明SOI SiGe HBT的特性怎么与基本物理参数联系起来,怎么影响电学性能,以及这些对应的电学参数如何建模。
本文重点研究SOI SiGe HBT关键理论和技术,主要包括SiGe材料基本物理属性,SOI SiGe HBT物理和电学模型。首先对器件电场、电势、耗尽宽度等基本参数,建立理论模型,分析对后续核心参数如寄生电阻、电容、特征频率等的影响,然后基于前面工作,建立一系列晶体管效应对应的电学参数模型,包括集电结耗尽层电容、Early效应及相关参数、集电结弱雪崩倍增效应及相关参数、不同衬底偏置下集电区电阻、基区渡越时间、大电流下有效基区扩展效应及相关参数。由于SOI SiGe HBT与常规器件结构的差别主要表现在集电结结构上,发射结部分的分析可以采用传统模型,本文研究重点在于与集电结和集电区有关的电学参数上。主要研究工作和成果如下：
1.将SOI SiGe HBT集电结耗尽电容等效为纵向部分与横向部分的串联,针对部分耗尽与全部耗尽HBT分别建模,并根据器件实际工作情况,引入平滑函数,进行了适当优化。仿真结果表明,与常规HBT相比,SOI器件耗尽层电容明显减小。
2. Early效应决定HBT电流稳定性。本文根据常规SiGe HBT在基区Ge组分均匀或线性变化的特性,从Early电压最原始定义出发,经过详细推导和适当近似,建立常规SiGe HBT的Early电压模型,然后基于SOI SiGe HBT集电结耗尽层电容模型,将其扩展到SOI SiGe HBT中。结果表明,正常工作时,SOI SiGe HBT的Early电压比常规SiGe HBT高,输出电流更加稳定。
3.雪崩倍增效应决定HBT反向击穿电压BVCEO。由于雪崩效应由碰撞电离决定,本文基于碰撞电离因子半经验公式,根据部分耗尽和全部耗尽HBT各自特性,分别建立了弱雪崩倍增因子模型。结果表明,SOI部分耗尽HBT和全部耗尽HBT的雪崩电流都比常规SiGe HBT小,因此SOI器件击穿电压高。
4.提出了采用不同衬底偏压改变集电区电阻的方法,使SOI SiGe HBT成为四端器件,显著改善了器件频率特性。结果表明,衬底正偏时,频率特性可提高50%。
5.建立了SOI SiGe HBT基区渡越时间和有效基区扩展模型,获得了其与几何结构参数和材料物理参数的变化规律。
The flexibility of the silicon-on-insulator (SOI) device architecture allows the obtaining of optimal electrical property for reduced parasitic capacitance, low leakage current, and improved immunity to substrate noise and crosstalk. Therefore, combining SiGe HBT with SOI technology, especially thin film SOI, is attractive for low power and high speed applications. A novel vertical SiGe HBT fabricated on thin film SOI substrate is proposed and integrated into the latest0.13μm millimeter-wave SiGe SOI BiCMOS technology. The device fabricated with the new technology shows decent performances, such as higher Early voltage, better trade-off between the base-collector avalanche breakdown voltage and the characteristic frequency, and better proton radiation effect. As the advantages of the device are thoroghly reported by experiments and simulations, the corresponding model should be analyzed theoretically. The purpose of the dissertation is to show how the unique features of the device can be linked to its physical origin, how they influence the electrical behaviours, and how the corresponding electrical parameters can be modelled.
The work concentrates on the critical theory and technology of SOI SiGe HBT, including the properity of SiGe alloy, the physical and electrical models of SOI SiGe HBT. First, the fundamental electrical parameters such as the electric field, the potential and the depletion width are theoretically modeled, the influence of which to parasitic resistance, capacitance, characterstic frequency, and so on, are discussed. Based on the previous work, a series of electrical parameter models of the transistor effects are proposed and verified by simulation results in details, including the base-collector depletion capacitance, the Early effect and related parameters, the collector weak avalanche multiplication effect and related parameters, the collector resistance under different substrate biases, the base transit time, the base widening effect with large current and related parameters. As the structure differences between the SOI and the bulk SiGe HBT are the design of base-collector junction, the base-emitter junction can be analyzed by the conventional model, the dissertation concentrates on the base-collector junction and collector related electrical parameters. The main research work and the results are listed as follows.
1. The base-collector depletion capacitance of SOI SiGe HBT is developed by considering the vertical and horizontal collector region as the series of the corresponding capacitance. The capacitances of partially and fully depleted devices are modeled respectively, with the result of dramastic reduction compared to the bulk conterparts. A smooth function is then introduced into the model for optimization based on the practical operation.
2. The Early voltage model of the SOI SiGe HBT is proposed analytically. First the Early effect features of the bulk SiGe HBT with uniform or linear Ge profile in the base are analyzed, and the corresponding model of the bulk device is developed according to the original Early voltage definition with a step-by-step derivation and appropriate assumptions, then the model is generalized to the SOI SiGe HBT based on the above base-collector depletion capacitance model. It is shown that the Early voltage of the SOI device is higher than that of the bulk counterpart, and hence the current is more stable.
3. The weak avalanche multiplication model of the SOI SiGe HBT is developed. The breakdown voltage BVCEO, which is depedent on the weak avalanche multiplication factor, is one of the key parameters of an HBT. As the avalanche multiplication is dominated by the impact ionization, the model is presented from the semi-emprical equation of the impact ionization factor, and applies for both the partially and fully depleted HBTs.
4. The substrate bias effect on the collector resistance is modeled. As the electrical characteristics of the SOI SiGe HBT are affected by the substrate bias, the SOI SiGe HBT is equalivent to a four terminal device and it is inevitable to research the substrate bias effect. The influence of the substrate bias on the collector resistance is analyzed in detail, resulting in a lower resistance and hence a larger characteristic frequency under positive bias compared to that of zero substrate bias.
5. The base transit time and the base width widening effect models are proposed analytically. The change trends of the corresponding parameters are obtained.
本文重点研究SOI SiGe HBT关键理论和技术,主要包括SiGe材料基本物理属性,SOI SiGe HBT物理和电学模型。首先对器件电场、电势、耗尽宽度等基本参数,建立理论模型,分析对后续核心参数如寄生电阻、电容、特征频率等的影响,然后基于前面工作,建立一系列晶体管效应对应的电学参数模型,包括集电结耗尽层电容、Early效应及相关参数、集电结弱雪崩倍增效应及相关参数、不同衬底偏置下集电区电阻、基区渡越时间、大电流下有效基区扩展效应及相关参数。由于SOI SiGe HBT与常规器件结构的差别主要表现在集电结结构上,发射结部分的分析可以采用传统模型,本文研究重点在于与集电结和集电区有关的电学参数上。主要研究工作和成果如下：
1.将SOI SiGe HBT集电结耗尽电容等效为纵向部分与横向部分的串联,针对部分耗尽与全部耗尽HBT分别建模,并根据器件实际工作情况,引入平滑函数,进行了适当优化。仿真结果表明,与常规HBT相比,SOI器件耗尽层电容明显减小。
2. Early效应决定HBT电流稳定性。本文根据常规SiGe HBT在基区Ge组分均匀或线性变化的特性,从Early电压最原始定义出发,经过详细推导和适当近似,建立常规SiGe HBT的Early电压模型,然后基于SOI SiGe HBT集电结耗尽层电容模型,将其扩展到SOI SiGe HBT中。结果表明,正常工作时,SOI SiGe HBT的Early电压比常规SiGe HBT高,输出电流更加稳定。
3.雪崩倍增效应决定HBT反向击穿电压BVCEO。由于雪崩效应由碰撞电离决定,本文基于碰撞电离因子半经验公式,根据部分耗尽和全部耗尽HBT各自特性,分别建立了弱雪崩倍增因子模型。结果表明,SOI部分耗尽HBT和全部耗尽HBT的雪崩电流都比常规SiGe HBT小,因此SOI器件击穿电压高。
4.提出了采用不同衬底偏压改变集电区电阻的方法,使SOI SiGe HBT成为四端器件,显著改善了器件频率特性。结果表明,衬底正偏时,频率特性可提高50%。
5.建立了SOI SiGe HBT基区渡越时间和有效基区扩展模型,获得了其与几何结构参数和材料物理参数的变化规律。
The flexibility of the silicon-on-insulator (SOI) device architecture allows the obtaining of optimal electrical property for reduced parasitic capacitance, low leakage current, and improved immunity to substrate noise and crosstalk. Therefore, combining SiGe HBT with SOI technology, especially thin film SOI, is attractive for low power and high speed applications. A novel vertical SiGe HBT fabricated on thin film SOI substrate is proposed and integrated into the latest0.13μm millimeter-wave SiGe SOI BiCMOS technology. The device fabricated with the new technology shows decent performances, such as higher Early voltage, better trade-off between the base-collector avalanche breakdown voltage and the characteristic frequency, and better proton radiation effect. As the advantages of the device are thoroghly reported by experiments and simulations, the corresponding model should be analyzed theoretically. The purpose of the dissertation is to show how the unique features of the device can be linked to its physical origin, how they influence the electrical behaviours, and how the corresponding electrical parameters can be modelled.
The work concentrates on the critical theory and technology of SOI SiGe HBT, including the properity of SiGe alloy, the physical and electrical models of SOI SiGe HBT. First, the fundamental electrical parameters such as the electric field, the potential and the depletion width are theoretically modeled, the influence of which to parasitic resistance, capacitance, characterstic frequency, and so on, are discussed. Based on the previous work, a series of electrical parameter models of the transistor effects are proposed and verified by simulation results in details, including the base-collector depletion capacitance, the Early effect and related parameters, the collector weak avalanche multiplication effect and related parameters, the collector resistance under different substrate biases, the base transit time, the base widening effect with large current and related parameters. As the structure differences between the SOI and the bulk SiGe HBT are the design of base-collector junction, the base-emitter junction can be analyzed by the conventional model, the dissertation concentrates on the base-collector junction and collector related electrical parameters. The main research work and the results are listed as follows.
1. The base-collector depletion capacitance of SOI SiGe HBT is developed by considering the vertical and horizontal collector region as the series of the corresponding capacitance. The capacitances of partially and fully depleted devices are modeled respectively, with the result of dramastic reduction compared to the bulk conterparts. A smooth function is then introduced into the model for optimization based on the practical operation.
2. The Early voltage model of the SOI SiGe HBT is proposed analytically. First the Early effect features of the bulk SiGe HBT with uniform or linear Ge profile in the base are analyzed, and the corresponding model of the bulk device is developed according to the original Early voltage definition with a step-by-step derivation and appropriate assumptions, then the model is generalized to the SOI SiGe HBT based on the above base-collector depletion capacitance model. It is shown that the Early voltage of the SOI device is higher than that of the bulk counterpart, and hence the current is more stable.
3. The weak avalanche multiplication model of the SOI SiGe HBT is developed. The breakdown voltage BVCEO, which is depedent on the weak avalanche multiplication factor, is one of the key parameters of an HBT. As the avalanche multiplication is dominated by the impact ionization, the model is presented from the semi-emprical equation of the impact ionization factor, and applies for both the partially and fully depleted HBTs.
4. The substrate bias effect on the collector resistance is modeled. As the electrical characteristics of the SOI SiGe HBT are affected by the substrate bias, the SOI SiGe HBT is equalivent to a four terminal device and it is inevitable to research the substrate bias effect. The influence of the substrate bias on the collector resistance is analyzed in detail, resulting in a lower resistance and hence a larger characteristic frequency under positive bias compared to that of zero substrate bias.
5. The base transit time and the base width widening effect models are proposed analytically. The change trends of the corresponding parameters are obtained.
引文
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