基于格件的信息处理机体系结构研究及其实现
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摘要
本论文用信息处理机抽象了规模大小不同、系统结构和应用范围各异的计算机系统,用信息处理机体系结构抽象了计算机系统的软、硬件体系结构和软硬件之间的接口,强调了信息处理机的设计不是分割开各自进行的软件或硬件系统的设计,而是软硬件系统协同设计(Hardware Software Co-Design)。目前,在该领域的体系结构层面存在高抽象层软硬件统一建模、各阶段模型之间转换、软硬件划分等问题,在实现技术层面存在并行构件的实现、自顶向下设计方法的实现等问题。本文以多核异构的粗粒度并行的信息处理机为主要研究对象,针对上述问题,提出了基于格件的信息处理机体系结构及以体系结构为中心的开发流程。
格件模型是齐德昱教授发明专利《基于形式领域融合的计算模型》中提出的一种新的计算机系统体系结构及对应的设计方法。基于该专利,本论文首先为信息处理机提供了一种新的体系结构,该体系结构统一抽象了信息处理机的软、硬件体系结构及之间的接口；其次,本论文提供了一种以体系结构为中心的、基于格件的信息处理机体系结构设计方法,用以弥补当前软件开发方法对并行系统及软硬件协同系统支持的不足。本论文最终目标是形成一个具有广泛发展前景的系统级设计模型、系统级开发方法和计算机辅助软件工程(CASE)技术,使得信息处理机可以像工业品一样,通过格件的组装、融合,得以快速实现。
本论文的主要研究内容和创新点概括如下：
1.针对信息处理机体系结构设计层次所面临的问题,提出了基于格件的信息处理机体系结构描述方法。
格件模型提出了一种新的信息处理机体系结构描述方法,用格件融合器抽象了具体功能的实现,封装了并行实现的软硬件构件的细节,提供了规范的接口对外服务,具有可重用性；用预制场定义了一组抽象规则,用以规范特定领域内的各融合器之间的通信方法和执行顺序,并为设计者提供了建立应用模型的框架；用格叙／场叙记录了格件模型的系统配置和连接状态；角格件引擎解析并执行格叙／场叙。基于格件的系统描述模型在高层抽象了信息处理机的构成,屏蔽了具体功能软硬件实现方案的区别和底层物理平台的多样性。
2.针对现有并行应用及软硬件协同系统开发方法的不足,提出了基于格件的、以体系结构为中心的、自顶向下的软硬件协同设计方法。
基于格件、并在预制场规范下建立的系统描述模型贯穿信息处理机开发全过程,并具备如下特征：1)可执行性,即可直接执行该模型以进行仿真验证,并支持基于该模型的设计空间搜索和系统协同综合；2)软硬件统一性,即针对系统功能建模,在实现阶段才进行软硬件划分；3)全局同构性,即系统开发的各阶段均基于该模型,并可直接转换为代码模型。用于软硬件系统设计领域的预制场采用了通信顺序进程模型作为并行编程的规范,采用标准C语言的扩展集impulseC语言作为融合器的实现手段。
3.针对软硬件协同领域设计空间巨大的问题,实现了一种去耦合的基于多目标优化算法的设计空间搜索模式。
传统的设计方法在相互制约的多个系统约束条件和优化目标下(如成本,功耗,时间特性等),无法达到系统的整体最优的设计方案。本文提出了基于系统描述模型的设计空间搜索算法,将传统的软硬件二元映射的搜索模型扩展为软硬件k路映射搜索模型,采用多目标遗传算法在设计空间中自动搜索Pareto最优解的设计方案。并通过建立规范的接口,将多目标优化算法的问题描述与问题求解进行去耦合化,从而实现了多种求解算法的平滑接入。
本文最后一章使用格件模型实现了基于多核可编程片上系统(MPSoC)的节点级信息处理机,基于MPSoC的复杂嵌入式设备是异构多核粗粒度信息处理机的典型代表。本设计方法并可通过平滑扩展来构造单板级、服务器级、集群级的信息处理机。
This thesis uses the information processing machine concept to abstract the computer systems with different scale, system architecture and application scope, and uses information processing machine architecture to abstract the software and hardware architecture and the interface between them. It emphasizes the design of information processing machine is not separated, independent implementation of software or hardware system, but hardware software co-design. Currently, there are many problems in this field, for the abstraction layer of the architecture, such as the unified modeling for hardware and software in high abstraction level, the separation of system level design decisions and implement, system reusability is poor, the conversion between each stage model, hardware and software division, and so on, for the technical aspects of the architecture, such as the implementation of parallel component, the top-down design methodology and so on. In this thesis the main object of study is the multi-core heterogeneous coarse-grained parallel information processing machine, to response to above problems, we propose a new gridware-based system architecture and a new architecture-centered design process.
Gridware model is a new computer architecture and a new design methodology from the invention patent:"the computation model based on formalized field fusion" contributed by Qi Deyu professor. Based this patent, we first propose a new architecture which is a abstraction of software and hardware architecture of information processing machine, and second, we provide a new architecture-centered gridware-based design methodology, It compensates for the lack of current software development methods for parallel system and hardware software co-design system. The ultimate goal of this thesis is to form a system-level design model, a design methodology, and a CASE technology, this methodology makes the information processing machines can be the same as the industrial, which can be rapid designed, verified and manufactured through the assembling and integration of the fusers.
The main contents of this thesis and innovations summarized as follows:
1. In regard to the problem of the architecture level of information processing machine, we propose a new architecture based on gridware.
Gridware model is a new system architecture, it uses gridjack fuser to abstract the concrete function of target system, encapsulates the details of parallel implementation of the hardware and software components, provide a standardized interface for external services, and has reusability. System filed is a set of abstract rules, which defines and standardizes the communication and order of execution between the fuses of some specific domain, and provides designers with a framework to building applications model. Gridjack description/Field description records the system configuration and connection status based on gridware model, gridjack engine analysises and implements the gridjack description or field description. The system description model based on gridware abstract the constitution of information processing machine on high level, and shields the concrete implementation of hardware and software solutions and the complexity of the underlying platform.
2. In regard to the shortcomings of the current design methodology for parallel application and hardware software co-design, we propose a new architecture-centered and top-down hardware software co-design methodology
The system description model based on gridware and specified by system field is used in the whole development process of information processing machine, it has the following characteristics:1) Executable attribute means that the model is described by a executable language, simulation can be directly on this model; and the design space exploration and co-synthesis can also directly executed on this model too.2) Hardware/Software without distinction means the system specification is modeling for system function, the Hardware/Software partition is not executed in system level.3) Global isomorphic refers to the specification throughout the design and implementation of all design level, and between the various abstract levels, it does not need model conversion. The system field for hardware/software co-design takes communication sequential processes as the specification for parallel programming, and takes the extended set of standard C:impulseC language to design gridjack fuser.
3. In regard to the huge space of hardware/software co-design, we achieve a new design space exploration mode which integrated design space exploration module based on decoupled multi-objective optimization algorithm
The traditional design approach could not achieve the comprehensive best scheme under multiple constraints and optimization objectives (such as cost, power, time, and so on). We propose the design space exploration algorithm based on the system description model, extends the traditional two meta mapping method of hardware/software partition to extension hardware/software mapping. In this thesis it uses multi-objective evolutionary algorithm to automatically search Pareto optimal solution in design space of system specification model. This thesis decouples the description and the solution of the evolutionary algorithm used for design space exploration. The description module is placed into system design framework, the solution module is opened out to the user-defined functions, and a standardized data exchange interface is established.
In the chapter6, we implement a node level information processing machine with MPSoC based on gridware model.Complex embedded devices based on MPSoC are typical representative of multi-core heterogeneous coarse-grained information processing machine. The methodology proposed in this thesis can be smooth expended to construct single-board level, server level and cluster level information processing machine.
格件模型是齐德昱教授发明专利《基于形式领域融合的计算模型》中提出的一种新的计算机系统体系结构及对应的设计方法。基于该专利,本论文首先为信息处理机提供了一种新的体系结构,该体系结构统一抽象了信息处理机的软、硬件体系结构及之间的接口；其次,本论文提供了一种以体系结构为中心的、基于格件的信息处理机体系结构设计方法,用以弥补当前软件开发方法对并行系统及软硬件协同系统支持的不足。本论文最终目标是形成一个具有广泛发展前景的系统级设计模型、系统级开发方法和计算机辅助软件工程(CASE)技术,使得信息处理机可以像工业品一样,通过格件的组装、融合,得以快速实现。
本论文的主要研究内容和创新点概括如下：
1.针对信息处理机体系结构设计层次所面临的问题,提出了基于格件的信息处理机体系结构描述方法。
格件模型提出了一种新的信息处理机体系结构描述方法,用格件融合器抽象了具体功能的实现,封装了并行实现的软硬件构件的细节,提供了规范的接口对外服务,具有可重用性；用预制场定义了一组抽象规则,用以规范特定领域内的各融合器之间的通信方法和执行顺序,并为设计者提供了建立应用模型的框架；用格叙／场叙记录了格件模型的系统配置和连接状态；角格件引擎解析并执行格叙／场叙。基于格件的系统描述模型在高层抽象了信息处理机的构成,屏蔽了具体功能软硬件实现方案的区别和底层物理平台的多样性。
2.针对现有并行应用及软硬件协同系统开发方法的不足,提出了基于格件的、以体系结构为中心的、自顶向下的软硬件协同设计方法。
基于格件、并在预制场规范下建立的系统描述模型贯穿信息处理机开发全过程,并具备如下特征：1)可执行性,即可直接执行该模型以进行仿真验证,并支持基于该模型的设计空间搜索和系统协同综合；2)软硬件统一性,即针对系统功能建模,在实现阶段才进行软硬件划分；3)全局同构性,即系统开发的各阶段均基于该模型,并可直接转换为代码模型。用于软硬件系统设计领域的预制场采用了通信顺序进程模型作为并行编程的规范,采用标准C语言的扩展集impulseC语言作为融合器的实现手段。
3.针对软硬件协同领域设计空间巨大的问题,实现了一种去耦合的基于多目标优化算法的设计空间搜索模式。
传统的设计方法在相互制约的多个系统约束条件和优化目标下(如成本,功耗,时间特性等),无法达到系统的整体最优的设计方案。本文提出了基于系统描述模型的设计空间搜索算法,将传统的软硬件二元映射的搜索模型扩展为软硬件k路映射搜索模型,采用多目标遗传算法在设计空间中自动搜索Pareto最优解的设计方案。并通过建立规范的接口,将多目标优化算法的问题描述与问题求解进行去耦合化,从而实现了多种求解算法的平滑接入。
本文最后一章使用格件模型实现了基于多核可编程片上系统(MPSoC)的节点级信息处理机,基于MPSoC的复杂嵌入式设备是异构多核粗粒度信息处理机的典型代表。本设计方法并可通过平滑扩展来构造单板级、服务器级、集群级的信息处理机。
This thesis uses the information processing machine concept to abstract the computer systems with different scale, system architecture and application scope, and uses information processing machine architecture to abstract the software and hardware architecture and the interface between them. It emphasizes the design of information processing machine is not separated, independent implementation of software or hardware system, but hardware software co-design. Currently, there are many problems in this field, for the abstraction layer of the architecture, such as the unified modeling for hardware and software in high abstraction level, the separation of system level design decisions and implement, system reusability is poor, the conversion between each stage model, hardware and software division, and so on, for the technical aspects of the architecture, such as the implementation of parallel component, the top-down design methodology and so on. In this thesis the main object of study is the multi-core heterogeneous coarse-grained parallel information processing machine, to response to above problems, we propose a new gridware-based system architecture and a new architecture-centered design process.
Gridware model is a new computer architecture and a new design methodology from the invention patent:"the computation model based on formalized field fusion" contributed by Qi Deyu professor. Based this patent, we first propose a new architecture which is a abstraction of software and hardware architecture of information processing machine, and second, we provide a new architecture-centered gridware-based design methodology, It compensates for the lack of current software development methods for parallel system and hardware software co-design system. The ultimate goal of this thesis is to form a system-level design model, a design methodology, and a CASE technology, this methodology makes the information processing machines can be the same as the industrial, which can be rapid designed, verified and manufactured through the assembling and integration of the fusers.
The main contents of this thesis and innovations summarized as follows:
1. In regard to the problem of the architecture level of information processing machine, we propose a new architecture based on gridware.
Gridware model is a new system architecture, it uses gridjack fuser to abstract the concrete function of target system, encapsulates the details of parallel implementation of the hardware and software components, provide a standardized interface for external services, and has reusability. System filed is a set of abstract rules, which defines and standardizes the communication and order of execution between the fuses of some specific domain, and provides designers with a framework to building applications model. Gridjack description/Field description records the system configuration and connection status based on gridware model, gridjack engine analysises and implements the gridjack description or field description. The system description model based on gridware abstract the constitution of information processing machine on high level, and shields the concrete implementation of hardware and software solutions and the complexity of the underlying platform.
2. In regard to the shortcomings of the current design methodology for parallel application and hardware software co-design, we propose a new architecture-centered and top-down hardware software co-design methodology
The system description model based on gridware and specified by system field is used in the whole development process of information processing machine, it has the following characteristics:1) Executable attribute means that the model is described by a executable language, simulation can be directly on this model; and the design space exploration and co-synthesis can also directly executed on this model too.2) Hardware/Software without distinction means the system specification is modeling for system function, the Hardware/Software partition is not executed in system level.3) Global isomorphic refers to the specification throughout the design and implementation of all design level, and between the various abstract levels, it does not need model conversion. The system field for hardware/software co-design takes communication sequential processes as the specification for parallel programming, and takes the extended set of standard C:impulseC language to design gridjack fuser.
3. In regard to the huge space of hardware/software co-design, we achieve a new design space exploration mode which integrated design space exploration module based on decoupled multi-objective optimization algorithm
The traditional design approach could not achieve the comprehensive best scheme under multiple constraints and optimization objectives (such as cost, power, time, and so on). We propose the design space exploration algorithm based on the system description model, extends the traditional two meta mapping method of hardware/software partition to extension hardware/software mapping. In this thesis it uses multi-objective evolutionary algorithm to automatically search Pareto optimal solution in design space of system specification model. This thesis decouples the description and the solution of the evolutionary algorithm used for design space exploration. The description module is placed into system design framework, the solution module is opened out to the user-defined functions, and a standardized data exchange interface is established.
In the chapter6, we implement a node level information processing machine with MPSoC based on gridware model.Complex embedded devices based on MPSoC are typical representative of multi-core heterogeneous coarse-grained information processing machine. The methodology proposed in this thesis can be smooth expended to construct single-board level, server level and cluster level information processing machine.
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