基于MPSoC的空间光学CCD遥感相机控制系统研究
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摘要
传统的微处理器被设计成固定的、单个的和可重用的模块，但是，在二十世纪九十年代随着专用集成电路ASIC和片上系统SOC制造技术的发展，多核技术逐渐应用到嵌入式的高端领域。以FPGA为载体的MPSoC（MultiprocessorSystems-on-Chip）成为目前嵌入式多核技术的发展趋势，它能够针对嵌入式的需求进行多核的定制化开发，FPGA的重复可编程性保证了系统的灵活性。
本文以空间CCD相机控制系统为例，针对目前航天电子学系统传统的自底向上的设计方法中存在的一些设计成本高，周期长，硬件实现正经受着高速高带宽发展趋势的挑战等问题，采用了一种MPSOC的解决方案。
在研究了MPSoC体系结构和设计方法的基础上，提出了一种基于EDK平台的异构MPSoC系统。基于平台的设计方法是自上而下和自底向上设计方法的综合，因此在设计过程中将自上而下的系统建模和基于平台库的IP复用技术紧密结合，将系统功能模块尽可能采用平台资源实现，加快了设计进程。
在系统设计的早期采用UML语言对系统进行了功能需求分析，建立了系统的静态功能模型和动态功能模型，在此基础上完成了系统软硬件协同划分；建立了EDK平台的资源模型和结构模型，实现了系统功能模型向平台模型的映射。
在系统软硬件协同设计阶段，首先完成了系统设计空间探索，在处理器架构上采用了一主两辅的异构多核结构，通过分析功能模块间的依赖关系，实现了并行任务的划分及映射，将不同类型任务分配到不同类型核上执行，将任务间的数据传递映射到通信体系结构上，提高了任务级并行处理能力。然后给出了硬件平台的设计过程，将硬件功能模块采用平台库里的IP或用户IP实现，通过CoreConnect总线连接到处理器。在软件实现方面，采用了主从编程模式，为主核移植操作系统Vxworks实现多个任务的调度，通过核间通信的方式控制辅核上程序的运行，给出了多核程序交互的过程，并针对辅核Microblaze_0处理器上进行的像移速度计算采取了容错措施，提高了关键计算型任务的可靠性。
为了对这种新的基于MPSoC的相机控制系统进行测试和分析，采用Xilinx公司的XUPV2P开发板和2个自主研制的扩展板作为平台对系统进行了验证，测试了多核间的通信，给出了资源评估和各处理器子系统的性能分析。实验表明，本文设计的MPSoC可以较好的实现相机控制系统的功能需求，具备较高的集成度和灵活性，并克服了传统DSP+FPGA设计方法中数据传输速度容易受接口和总线带宽的限制及信号间容易串扰的弊端。
Traditional Microprocessor was a fixed single module which can be reused,however, with the rapid development of ASIC(Application Specific IntegratedCircuit) and SOC(System On Chip) in1990s, multi-core technology has beengradually applied into high-level embedded field. MPSoC(MultiprocessorSystems-on-Chip) on FPGA is the trend of embedded multi-core technologycurrently, which can realize multi-core customized development aimed at embeddedrequirement and has a lot flexibility because of reprogrammable FPGA.
Currently some problems such as high-price, long-period, high-speed and widebandwidth exist in bottom-to-up method of space electronic system, to solve theproblems, a MPSoC solution was proposed and applied into the design of spaceremote sensing camera control system.
After the research of MPSoC architecture and methodology, an asymmetryMPSoC system based on EDK platform was set up. Design method based onplatform is a combination of top-down and bottom-to-up method, so systemmodeling and IP reuse technology was tightly combined in design process. Most ofthe system functional module was implemented by platform resource, acceleratingthe process.
In the earlier design stage UML was used to realize the functional requestanalysis and set up the system static functional model and dynamic model to implement software and hardware co-partition. Then resource model and structuremodel of EDK platform was set up to realize the map from system functional modelto platform model.
During system software and hardware co-design, first system design spaceexplore was implemented: a processor architecture with one main core and twoauxiliary cores was choosed; after analyzing the relationship among functionalmodules, parallel tasks were partitioned and tasks with different types weredesignated into different processors; data passing between processors was mappedinto the communication architecture, thus parallel processing ability was improvedin task level. Then the hardware platform design process was illustrated, duringwhich hardware functional module was accomplished by IP in platform library oruser’s IP connected to processors through IBM CoreConnect Bus. For software,master-slave programmable model was adopted, embedded real-time operatingsystem Vxworks was transplanted onto the main core to schedule complicated tasks,controlling the run of program on auxiliary cores by inter-processor communication.Furthermore, fault tolerate measures were taken for key computing task on oneauxiliary core to enhance the reliability.
To test and analyze the new camera control system based on MPSoC, a Xilinxdevelop board XUPV2P and two self-developed extend boards were used to verifythe system. Communication between processors was tested, total resource and persubsystem’s performance was analyzed. Experiments showed that the MPSoCdesigned in this paper can fulfill the camera control system’s requirement with highintegrity and flexibility, overcoming the shortcomings of data transmission speedlimited by interface and bus bandwidth and signals disturbance in traditional DSP+FPGA design method.
本文以空间CCD相机控制系统为例，针对目前航天电子学系统传统的自底向上的设计方法中存在的一些设计成本高，周期长，硬件实现正经受着高速高带宽发展趋势的挑战等问题，采用了一种MPSOC的解决方案。
在研究了MPSoC体系结构和设计方法的基础上，提出了一种基于EDK平台的异构MPSoC系统。基于平台的设计方法是自上而下和自底向上设计方法的综合，因此在设计过程中将自上而下的系统建模和基于平台库的IP复用技术紧密结合，将系统功能模块尽可能采用平台资源实现，加快了设计进程。
在系统设计的早期采用UML语言对系统进行了功能需求分析，建立了系统的静态功能模型和动态功能模型，在此基础上完成了系统软硬件协同划分；建立了EDK平台的资源模型和结构模型，实现了系统功能模型向平台模型的映射。
在系统软硬件协同设计阶段，首先完成了系统设计空间探索，在处理器架构上采用了一主两辅的异构多核结构，通过分析功能模块间的依赖关系，实现了并行任务的划分及映射，将不同类型任务分配到不同类型核上执行，将任务间的数据传递映射到通信体系结构上，提高了任务级并行处理能力。然后给出了硬件平台的设计过程，将硬件功能模块采用平台库里的IP或用户IP实现，通过CoreConnect总线连接到处理器。在软件实现方面，采用了主从编程模式，为主核移植操作系统Vxworks实现多个任务的调度，通过核间通信的方式控制辅核上程序的运行，给出了多核程序交互的过程，并针对辅核Microblaze_0处理器上进行的像移速度计算采取了容错措施，提高了关键计算型任务的可靠性。
为了对这种新的基于MPSoC的相机控制系统进行测试和分析，采用Xilinx公司的XUPV2P开发板和2个自主研制的扩展板作为平台对系统进行了验证，测试了多核间的通信，给出了资源评估和各处理器子系统的性能分析。实验表明，本文设计的MPSoC可以较好的实现相机控制系统的功能需求，具备较高的集成度和灵活性，并克服了传统DSP+FPGA设计方法中数据传输速度容易受接口和总线带宽的限制及信号间容易串扰的弊端。
Traditional Microprocessor was a fixed single module which can be reused,however, with the rapid development of ASIC(Application Specific IntegratedCircuit) and SOC(System On Chip) in1990s, multi-core technology has beengradually applied into high-level embedded field. MPSoC(MultiprocessorSystems-on-Chip) on FPGA is the trend of embedded multi-core technologycurrently, which can realize multi-core customized development aimed at embeddedrequirement and has a lot flexibility because of reprogrammable FPGA.
Currently some problems such as high-price, long-period, high-speed and widebandwidth exist in bottom-to-up method of space electronic system, to solve theproblems, a MPSoC solution was proposed and applied into the design of spaceremote sensing camera control system.
After the research of MPSoC architecture and methodology, an asymmetryMPSoC system based on EDK platform was set up. Design method based onplatform is a combination of top-down and bottom-to-up method, so systemmodeling and IP reuse technology was tightly combined in design process. Most ofthe system functional module was implemented by platform resource, acceleratingthe process.
In the earlier design stage UML was used to realize the functional requestanalysis and set up the system static functional model and dynamic model to implement software and hardware co-partition. Then resource model and structuremodel of EDK platform was set up to realize the map from system functional modelto platform model.
During system software and hardware co-design, first system design spaceexplore was implemented: a processor architecture with one main core and twoauxiliary cores was choosed; after analyzing the relationship among functionalmodules, parallel tasks were partitioned and tasks with different types weredesignated into different processors; data passing between processors was mappedinto the communication architecture, thus parallel processing ability was improvedin task level. Then the hardware platform design process was illustrated, duringwhich hardware functional module was accomplished by IP in platform library oruser’s IP connected to processors through IBM CoreConnect Bus. For software,master-slave programmable model was adopted, embedded real-time operatingsystem Vxworks was transplanted onto the main core to schedule complicated tasks,controlling the run of program on auxiliary cores by inter-processor communication.Furthermore, fault tolerate measures were taken for key computing task on oneauxiliary core to enhance the reliability.
To test and analyze the new camera control system based on MPSoC, a Xilinxdevelop board XUPV2P and two self-developed extend boards were used to verifythe system. Communication between processors was tested, total resource and persubsystem’s performance was analyzed. Experiments showed that the MPSoCdesigned in this paper can fulfill the camera control system’s requirement with highintegrity and flexibility, overcoming the shortcomings of data transmission speedlimited by interface and bus bandwidth and signals disturbance in traditional DSP+FPGA design method.
引文
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