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用于地震检波的高精度A/D转换器设计
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摘要
石油是现代社会发展和生活极其重要的资源。现代石油地质勘探通过人为地震使地层反射声波分析地质构造并寻找油气田,地震检波器记录声波并用计算机处理这些数据,构造出地下岩层系统的图像。数字地震检波器将传感器和高精度A/D转换器相结合,并通过数据处理,完成地震数据采集,具有重量轻、体积小、易组网、稳定性好、灵敏度高等特点,是当前发展的趋势。
     用于地震勘探的A/D转换器是影响数字地震检波器性能的主要部件,要求精度高、动态范围大、性能稳定,普通的A/D转换器很难达到。目前流行的∑ΔA/D转换器在低频高分辨率应用方面表现出色,它采用高速率采样,用一位量化、积分器噪声整形和数字滤波技术得到高分辨率数字信号,在新一代地震仪中广泛使用,并且成为国内外研究的技术重点。
     本课题在山东省自然科学基金支持下对高精度数字地震检波器进行理论研究和应用设计,目标是基于前端MEMS加速度传感器,设计符合要求的高精度A/D转换器,构成具有自主知识产权的高精度数字地震检波器。本课题完成的主要工作有:
     1.对∑△调制器的原理进行数学建模和仿真分析
     对线性化量化器的∑△调制器进行数学建模分析,以用于地震检波的MEMS传感器输出信号特征为参数,用MATLAB和Simulink对∑△调制器做系统级的仿真。∑△调制器的特点在于运用了过采样和噪声整形技术。通过数学建模和仿真分析,一阶∑△调制器达到高精度很困难,而高阶、级联等结构的∑△调制器可以达到高的分辨率,但是要考虑系统的稳定性和参数设计问题。
     2.分析开关电容型∑△调制器非理想因素
     实际电路存在很多非理想因素,无法精确数学建模,通过分析和仿真开关电容∑△调制器的各种非理想因素,对实际设计∑△调制器起到预测和指导作用,电路设计时尽可能降低非理想因素对系统性能的影响。
     3.电路实现∑△调制器
     用于地震检波的∑ΔA/D转换器结构上分为调制器电路和数字抽取滤波电路。调制器电路由积分器、比较器、D触发器和反馈等组成,难点在于选取合适带宽和速度的运放及对积分器阻抗匹配(即设计合适参数)。文章从multisim电路仿真、PCB布板到电路制板,实现了二阶∑△调制器,通过测试,性能指标满足设计要求。
     4.探索和尝试复杂结构∑△调制器的参数优化
     对于地震检波中A/D转换器要达到120dB以上的分辨率,∑△调制器往往需要采用性能等同于高阶∑△调制器的改进结构的∑△调制器(级联式,插入网络式等),复杂结构的∑△调制器的参数设计是难点。文章创新性的运用模拟退火算法对用于地震检波中的∑△调制器进行参数设计。
Oil is one of the most important energy of our modern society. Oil exploration workers find the oil reservoir within reflected sound waves, and record the time of which sound waves reflected back. Then process the data and construct the image of underground rock system by using computer. Geophone is responsible for receiving and processing reflection waves which are generated by man-made seismic. Traditional geophone is only a sensor, but modern geophone is composed of a sensor and an A/D converter. Within micro-technology they are integrated in a chip which is called digital seismograph. The transmission of digital signal has high reliability and informative in a digital seismograph, and weak signal can be preserved as much as possible, as well as noise would be reduced.
     The resolution of A/D converter has great effort to seismograph, so high resolution, good dynamic range and stable performance of A/D converters in seismic exploration are required which is difficult to a normal Nyquist A/D converter.ΣΔA/D converter is popular because of outstanding behavior in the low-frequency and high-precision implement. By means of high-rate sampling, one-bit quantization, integrator noise shaping technology and digital filters,ΣΔADC is able to get high resolution, so it is widely used in the new generation of seismograph, and the most of major manufacturers focus on this technique gradually.
     The subject is theoretical study and application implementation of the high-precision digital geophone system support in the Shandong Province Natural Science Foundation. High-precision A/D converter bases on front-end MEMS accelerometer analog sensor which integrated with an A/D converter on a chip to form a self-intellectual property rights of high-precision digital seismic detector. The main jobs in this subject are:
     1. Modeling and analysis ofΣΔmodulator
     In accordance with the signal parameter which output by MEMS sensors of seismic detection, using MATLAB and Simulink to simulateΣΔmodulator in system-level. The main features ofΣΔmodulator are over sampling and noise shaping. By mathematical and simulation analysis, we can learn first-orderΣΔmodulator is very difficult to achieve high accuracy, while high order and cascadeΣΔmodulator can achieve high resolution.
     2. Analysis of non-idealities of switched capacitorΣΔmodulator
     There are many non-ideal factors in actual circuit. You can not figure accurately the mathematical modeling, except analyze and simulate any possible phenomenon in the circuit lever, such as finite amplifier gain and component mismatch. These non-ideal factors will result in nonlinearities and degrade the SNR, a high-level modeling method based on MATLAB is presented which could guide the circuit design ofΣΔmodulator.
     3. Circuits design ofΣΔModulator
     ΣΔA/D converter is the cascade of an analog modulator and a digital filter. Modulator circuit consists of integrator, comparator, D flip-flops and feedback. The difficulty lies in selecting appropriate bandwidth and speed of opamp, choosing suitable parameters of integrator, and the circuit stability problems. In digital section, where the system clock generation, digital filtering and down-sample data take place by using FPGA. In this paper, the second orderΣΔmodulator circuits design is presented and the performance can meet the needs.
     4. Explore parameter optimization method of cascade and interpolative loopΣΔmodulator
     High-order and single-loopΣΔmodulator suffers from instability problems and considerable performance degradation compared to an ideal modulator. An alternative to circumvent instabilities while obtaining high-order shaping can be found in the cascade and interpolative loopΣΔmodulator. The problem is the coefficients design which is combinatorial optimization problems. The scheme adopts Simulated Annealing Algorithm to design parameters.
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