基于FPGA的甚短距离高速并行光传输系统研究
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摘要
甚短距离传输(VSR)是一种用于短距离(约300 m~600m)内进行数据传输的光传输技术。它主要应用于网络中的交换机、核心路由器(CR)、光交叉连接设备(OXC)、分插复用器(ADM)和波分复用(WDM)终端等不同层次设备之间的互连,具有构建方便、性能稳定和成本低等优点,是光通信技术发展的一个全新领域,逐渐成为国际通用的标准技术,成为全光网的一个重要组成部分。
本文深入研究了VSR并行光传输系统,完成了VSR技术的核心部分——转换器子系统的设计与实现,使用现场可编程阵列FPGA(Field Programmable Gate Array)来完成转换器电路的设计和功能实现。深入研究现有VSR4-1.0和VSR4-3.0两种并行传输标准,在其技术原理的基础上,提出新的VSR并行方案,提高了多模光纤带的信道利用率,充分利用系统总吞吐量大的优势,为将来向更高速率升级提供了依据。根据万兆以太网的技术特点和传输要求,提出并设计了用VSR技术实现局域和广域万兆以太网在较短距离上的高速互连的系统方案,成功地将VSR技术移植到万兆以太网上,实现低成本、构建方便和性能稳定的高速短距离传输。
本文所有的设计均在Altera Stratix GX系列FPGA的EP1SGX25F1020C7上实现,采用Altera的Quartus II开发工具和Verilog HDL硬件描述语言完成了VSR4-1.0转换器集成电路和万兆以太网的SERDES的设计和仿真,并给出了各模块的电路结构和仿真结果。仿真的结果表明,所有的设计均能正确的实现各自的功能,完全能够满足10Gb/s高速并行传输系统的要求。
Very short reach (VSR) is an optical transmission technology to transmit data over a short distance (about 300m~600m). It is mainly used to link two equipments of different network layers,such as switch,CR,OXC,ADM and WDM terminals. It has the advantage of easy constructing,stable performance and low cost. It is a new field of optical communication technology development, and gradually becomes a universal standard technology. VSR has become an important part of all optical networks.
In this paper, VSR parallel optical transmission system is deeply studied. We design the converter IC of VSR system according to OIF-VSR4-01.0 standard, and implement it using FPGA.We also investigate the existing two parallel VSR standards: VSR4-1.0 and VSR4-3.0, on the basis of whose principle new parallel VSR schemes are introduced. The new schemes can elevate the utilization efficiency of multimode fiber array. They can take full advantage of large system throughput, and supply reference for the future higher data rate upgrading. According to the technical specialities and transmiting request of 10 Gigabit Ethernet (10GbE), the system schemes implementing the high-speed interconnection of 10GE LAN and WAN are introduced and designed. So VSR is transplanted to 10GE successfully to fulfill the short reach transmission with the advantages of easy construct,stable performance and low cost.
All designs in this paper are realized using EP1SGX25F1020C7 FPGA of Altera Stratix GX series. Altera’s development kit Quartus II and Verilog HDL are used to complete the designs and simulations of converter IC according to VSR4-1.0 and 10GbE’s SERDES IC. The structures and simulation results of modules are showed. Through the results, we can draw the conclusion that all of the designs can correctly implement their functions and meet the requests of 10Gb/s high-speed parallel optical transmission system.
本文深入研究了VSR并行光传输系统,完成了VSR技术的核心部分——转换器子系统的设计与实现,使用现场可编程阵列FPGA(Field Programmable Gate Array)来完成转换器电路的设计和功能实现。深入研究现有VSR4-1.0和VSR4-3.0两种并行传输标准,在其技术原理的基础上,提出新的VSR并行方案,提高了多模光纤带的信道利用率,充分利用系统总吞吐量大的优势,为将来向更高速率升级提供了依据。根据万兆以太网的技术特点和传输要求,提出并设计了用VSR技术实现局域和广域万兆以太网在较短距离上的高速互连的系统方案,成功地将VSR技术移植到万兆以太网上,实现低成本、构建方便和性能稳定的高速短距离传输。
本文所有的设计均在Altera Stratix GX系列FPGA的EP1SGX25F1020C7上实现,采用Altera的Quartus II开发工具和Verilog HDL硬件描述语言完成了VSR4-1.0转换器集成电路和万兆以太网的SERDES的设计和仿真,并给出了各模块的电路结构和仿真结果。仿真的结果表明,所有的设计均能正确的实现各自的功能,完全能够满足10Gb/s高速并行传输系统的要求。
Very short reach (VSR) is an optical transmission technology to transmit data over a short distance (about 300m~600m). It is mainly used to link two equipments of different network layers,such as switch,CR,OXC,ADM and WDM terminals. It has the advantage of easy constructing,stable performance and low cost. It is a new field of optical communication technology development, and gradually becomes a universal standard technology. VSR has become an important part of all optical networks.
In this paper, VSR parallel optical transmission system is deeply studied. We design the converter IC of VSR system according to OIF-VSR4-01.0 standard, and implement it using FPGA.We also investigate the existing two parallel VSR standards: VSR4-1.0 and VSR4-3.0, on the basis of whose principle new parallel VSR schemes are introduced. The new schemes can elevate the utilization efficiency of multimode fiber array. They can take full advantage of large system throughput, and supply reference for the future higher data rate upgrading. According to the technical specialities and transmiting request of 10 Gigabit Ethernet (10GbE), the system schemes implementing the high-speed interconnection of 10GE LAN and WAN are introduced and designed. So VSR is transplanted to 10GE successfully to fulfill the short reach transmission with the advantages of easy construct,stable performance and low cost.
All designs in this paper are realized using EP1SGX25F1020C7 FPGA of Altera Stratix GX series. Altera’s development kit Quartus II and Verilog HDL are used to complete the designs and simulations of converter IC according to VSR4-1.0 and 10GbE’s SERDES IC. The structures and simulation results of modules are showed. Through the results, we can draw the conclusion that all of the designs can correctly implement their functions and meet the requests of 10Gb/s high-speed parallel optical transmission system.
引文
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[2] Jeff E.Bisberg,et al,850nm Serial VSR in 10Gbps Communication System,OFC2002 paper ThGG122
[3] M. Webster,L. Raddatz,I. H. White,and D. G. Cunningham,A Statistical Analysis of Conditioned Launch for Gigabit Ethernet Links Using Multimode Fiber,JOURNAL OF LIGHTWAVE TECHNOLOGY, 1999,17(9):1531~1541
[4] Steven E.Golowich, Development of specifications for high-speed short-reach parallel multimode fiber interconnects, Proceedings of OFC 2004,postdeadline paper THI2,2004
[5] OIF Physical and link layer working group, Very Short Reach (VSR) OC-192/STM-64 Interface Based on Parallel Optics: Implementation Agreement OIF-VSR-01.0,California,USA,2000
[6] OIF Physical and link layer working group,Serial OC-192 1310nm Very Short Reach (VSR) Interface:Implementation Agreement OIF-VSR-02.0,California, USA,2000
[7] OIF Physical and link layer working group,Very Short Reach(VSR) OC-192 four fiber Interface Based on Parallel Optics:Implementation Agreement OIF-VSR-3.1,California,USA,2003
[8] OIF Physical and link layer working group,Serial Shortwave Very Short Reach(VSR) for Multimode Fiber:Implementation Agreement OIF-VSR-04.0,California,USA,2001
[9] OIF Physical and link layer working group,Very Short Reach(VSR) OC-192 Interface using 1310nm Wavelength and 4dB and 11dB Link Budgets:Implementation Agreement OIF-VSR-05.0,California,USA,2002
[10] OIF Physical and link layer working group,System Physical Interface Level 3(SPI-3):OC-48 System Interface for Physical and Link Layer Devices:Implementation Agreement OIF-SPI3-01.0,California,USA,2000
[11] OIF Physical and link layer working group,System Physical Interface Level 4(SPI-4) Phase 1:A System Interface for Interconnection Between Physical and Link Layer,or Peer-to Peer Entities Operating at an OC-192 Rate( 10Gb/s):Implementation Agreement OIF-SPI4-01.0,California,USA,2001
[12] OIF Physical and link layer working group,System Physical Interface Level 4(SPI-4) Phase 2 Revision 1:OC-192 System Interface for Physical and Link Layer Devices:Implementation Agreement OIF-SPI4-02.0,California,USA,2003
[13] OIF Physical and link layer working group,SFI-4 (OC-192 Serdes-Framer Interface) OIF-PLL-02.0-Proposal for a common electrical interface between SONET Framer and serializer/deserializer parts for OC-192 interfaces):Implementation Agreement OIF-SFI4-01.0,California,USA,2000
[14] OIF Physical and link layer working group,SERDES Framer Interface Level 4(SFI-4 ) Phase 2:Implementation Agreement for 10Gb/s Interface for Physical Layer Devices:Implementation Agreement OIF-SFI4-02.0,California,USA,2002
[15] OIF Physical and link layer working group,Very Short Reach Interface Level 5(VSR-5):SONET/SDH OC-768 Interface for Very Short Reach (VSR) Application:Implementation Agreement OIF-VSR5-01.0,California,USA,2002
[16] OIF Physical and link layer working group,System Packet Interface Level 5 (SPI-5):OC-768 System Interface for Physical and Link Layer Devices: Implementation Agreement OIF-SPI5-01.0,California,USA,2002
[17] OIF Physical and link layer working group,TDM Fabric to Framer Interface Implementation Agreement:Implementation Agreement OIF-TFI5-01.0,California,USA,2003
[18] OIF Physical and link layer working group,SERDES Framer Interface Level 5(SFI-5) Implementation Agreement for 40Gb/s Interface for Physical Layer Devices:Implementation Agreement OIF-SFI5-01.0,California,USA,2002
[19] Cisco White Paper.Very Short Reach OC-192/STM-64 Interface:Optimizing for Network Intra-POP Interconnections.P2
[20] A.X.Widmer,P.A.Franaszek,A DC-Balance,Partitioned-Block,8B/10B Transmission Code,IBM Journal of research and development,1983,23(5),p 441-443
[21] Stratix GX FPGA Family Data Sheet,Altera Corporation,2002,2
[22] 10Gigabit Ethernet Alliance White Paper.10Gigabit Ethernet Technology Overview.2001,6
[23] IEEE Std 802.3ae.2002 Edition
[24] Penty, R.V. (Univ of Bristol),Webster, M.,Massara, A.B.,White, I.H,Physical layer strategies for 10 gigabit Ethernet,Proceedings -Electronic Components and Technology Conference, 2000, p 487-490
[25] Cunningham, David G. (Network Solutions Division, Agilent Technologies Inc.),The status of the 10-Gigabit Ethernet standard,European Conference on Optical Communication, ECOC, v 3, 2001, p 364-367
[26] Cueni, T.,Gilligmann, B.,10 Gigabit Ethernet - Breaking the LAN/MAN/WAN barriers,ComTec, v 79, n 7-8, 2001, p 3-7
[27] Cravotta,Nicholas,10 Gigabit Ethernet takes on SONET,Australian Electronics Engineering, v 35, n 1, January, 2002, p 24-27
[28] Dallesasse,John (Molex Fiber Optics),10-GbE transceivers: The future is now, Lightwave, v 19, n 1, January, 2002, p 92-97
[29] Yoshimura,Tsutomu (Mitsubishi Electric Corporation),Ueda, Kimio,Takasoh, Jun,Kondoh, Harufusa,A 10 Gbase ethernet transceiver (LAN PHY) in a 1.8 V, 0.18 μm SOI/CMOS technology,EICE Transactions on Electronics, v E86-C, n 4, April, 2003, p 643-651
[30] Knoch, Markus,Taking 10 gigabit ethernet SOCs to volume,European Semiconductor Design Production Assembly, v 24, n 8, July, 2002, p 19-21
[31] Yang, Ming (East China Univ),Study of 10 Gigabit ethernet 10GBASE-WX PHY,Jisuanji Gongcheng/Computer Engineering, v 26, n 9, Sep, 2000, p 125-128 Language: Chinese
[32] Kozischek, David (Coming Cable Systems),Laser-optimized MMF for 1/10-GbE campus backbone,Lightwave, v 21, n 4, April, 2004, p 36-39
[33] Lemoff,Brian E. (Agilent Lab),Technology alternatives for 10 Gbit/s LANs, Conference on Optical Fiber Communication,Technical Digest Series, v 2, 2000, p 146
[34] Altera Application note,Configuring PLDs with Flash Memory,2000,10
[35] Altera Application note,Configuring APEX20K,FLEX10K&FLEX6000 Device 2000,5
[36] Altera Application note,Configuring SRAM-Based LUT Devices,2002,11
[37] Altera Application note,Configuring Stratix&Stratix GX Devices,2002,11
[38] Configuration Handbook,Altera Corporation,2004,7
[39] Remote System Configuration with Stratix&Stratix GX Devices,Altera Corporation,2004,9
[40] Altera White Paper,SRUNNER:An Embedded Solution for Serial Configuration Device Programming,2003,8
[41] 陈弘达,左超,甚短距离光传输技术,北京:科学出版社,2004
[42] 杨祥林,光纤通信系统,北京:国防工业出版社,2002
[43] 褚振勇,翁木云,FPGA设计及应用,西安:西安电子科技大学出版社,2002
[44] 孙玉,数字复接技术,北京:人民邮电出版社,1991
[45] 曹志刚,钱亚生,现代通信原理,北京:清华大学出版社,1998
[46] 张亮,数字电路设计与Verilog HDL,北京:人民邮电出版社,2000
[47] Rich Seifert 著,郎波 等译,千兆以太网技术与应用,北京:机械工业出版社,2000
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