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链路自适应技术的研究与关键模块的实现
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摘要
无线信道中的多径传播效应和时变特性极大降低了移动通信系统的性能。此外,随着移动通信用户的剧增,频谱资源的匮乏也成了制约无线通信发展的重要原因。链路自适应技术是解决以上难题的关键技术。OFDM技术具有抗多径效应和高频谱利用率的优点。而作为链路自适应技术之一的OFDM动态资源分配技术更是吸引了人们的关注。
     本文首先介绍了链路自适应涉及到的部分通信理论,然后描述了自适应编码、功率控制、自动请求重传、OFDM动态资源分配、联合信源信道编码等常用的链路自适应技术。接着,为了提供一个研究OFDM动态资源分配技术的平台,本文介绍了一套以数字信号处理器(Digital Signal Processor)为核心的OFDM基带系统的部分硬件和部分软件的开发调试过程。在硬件上,本文介绍了该系统中的DSP最小系统板和FIFO接口板的硬件设计过程;在软件上,介绍了基于DVB-T 2K模式的OFDM基带系统的软件部分的调测过程,描述了该系统中信道编码的部分C语言程序的优化过程;为了系统集成,本文还设计了DSP与FPGA、DSP与DSP之间的接口程序,并对系统的接口进行了联调。最后,为下一步工作做准备,本文还对多DSP并行处理技术进行了介绍。
In wireless communication networks, the performance of wireless links is severely degraded due to multi-path propagation effect and time variance characteristics. In addition, with the surge of mobile communication users, the scarcity of frequency spectrum seriously limits the development of wireless communication. Link adaptation is the key technology of solving these problems. OFDM (Orthogonal Frequency Division Multiplexing) has the strongpoint of effectively combating multi-path effect and high frequency spectrum using efficiency. As one of link adaptation technologies, OFDM dynamic resource allocation technology attracts the attention of researchers.
     In this thesis, the basic theory of link adaptation and the key technologies are introduced. Link adaptation, such as Adaptive Modulation Coding, Power Control, Automatic Repeat Request, OFDM dynamic resource allocation technology and joint source channel coding technology etc, are described. In order to investigate OFDM dynamic resource allocation technology, an OFDM baseline system based on Digital Signal Processor is introduced. This system is the hardware platform of investigating OFDM dynamic resource allocation technology. The hardware design of DSP system board and FIFO (First-in First-out) board are introduced emphatically. Furthermore, the debugging of OFDM baseline software of DVB-T 2K model is introduced, and some C language programs of channel coding in this system are optimized. The interface programs from DSP to DSP and FPGA are designed. The interfaces of hardware system are debugged. At last, multi-DSPs parallel processing technology is introduced.
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