0.6μm CMOS工艺900MHz GSM低噪声放大器和混频器的设计
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摘要
近几十年来，随着无线通信技术的不断发展，人类已基本实现随时随地通信的梦想，相应地，人类对高性能大容量无线通信系统的需求也越来越大。在这种形势下，射频与通信集成电路的研究已趋于白热化。目前，各种无线通信标准并存，但市场份额最大的还是GSM系统，因此，针对GSM标准进行射频接收电路的研究和设计具有重要的现实意义。
低噪声放大器(LNA)和混频器(Mixer)是无线通信射频接收机中不可缺少的关键电路。近年来，随着无线通讯由第二代(2G)标准向第三代(3G)标准过渡，系统对芯片的噪声系数和线性度等指标提出了更高的要求。同时，为了满足产品化后高可靠性和低成本的要求，芯片需要高集成度，因此射频接收机必须单芯片实现。
本文介绍了LNA和Mixer的基本原理以及几种常见的LNA和Mixer结构，并对各种结构的优缺点作了阐述。针对目前LNA和Mixer中应用最为广泛的源极电感负反馈LNA和CMOS开关型Gilbert混频器，文章作了较为详细的分析。在此基础上，文中对这两种结构进行了优化，提出了全差分电感负反馈LNA结构和低压Gilbert混频器结构。该优化的结构扬原有电感负反馈LNA和Gilbert混频器电路之长，避其之短，解决了LNA电路中电感失配的影响，Gilbert混频器电路中电源电压高、线性度低的问题。
CMOS工艺的电感和MOS管噪声是设计LNA和Mixer时需要考虑的非常重要的问题。本文专门介绍了电感的模型、品质因数以及自谐振频率，介绍了MOS管的射频和噪声模型以及其最新发展，讨论了模型的选择对设计结果的影响。
文章根据GSM接收机标准给出了基于0.6μmCMOS工艺、采用全差分电感负反馈结构的LNA和低压Gilbert结构混频器完整的电路设计、模拟结果和版图设计。模拟结果表明，采用该方案的LNA和Mixer基本达到了GSM的设计标准。更进一步的结果有待于芯片制作完成后的功能测试。
With the development of the technology of wireless communication in recent decades, people have basicly realized the dream of communication anywhere and anytime. At the same time, the demand for high-performance and large-capability wireless communication systems has been on a great upsurge. Under such circumstances, researches in the field of radio and wireless communication IC become more and more heated. Now all kinds of wireless communication standard exists, but GSM system share the biggest market. Thus, it is important to research and design radio IC according GSM standard.
Low noise amplifier(LNA) and Mixer is the key component in radio transceiver. As the standard of wireless communication upgrades from the second generation to the third generation in recent years, the performance such as noise figure(NF) and linearity of IC must be promoted. Simultaneously, in order to satisfy product's high performance and low cost, chips need a higher intergration. Therefore, radio transceiver must be fully monolithic integration.
This paper introduces the fundamentals of LNA and Mixer, withing some common structure as well as their merits and demerits given out. The paper also gives a detailed analysis of the LNA with source inductor degeneration and CMOS commutating Gilbert Mixer, which are currently the most widely used. Based on the analysis, an optimized full differential inductor degeneration LNA and low voltage Gilbert Mixer is presented. This type of LNA and Mixer enjoys the advantages of the anterior LNA and Mixer, while resolves the problem of inductor's mismatch and mixer's high power voltage and low linearity.
The inductor per se in CMOS process and the MOSFET's noise is an important issue in designing LNA and Mixer. This thesis specially introduced the inductor's modeling and the MOSFET's radio and noise model, and discussed the simulation result under the influence of different model.
The final part of the paper presents a LNA and Mixer chip fabricated in 0.6 m CMOS technology used for GSM system. The simulation results and the layout design are provided . The results indicate that this cascade LNA and Mixer is compliant with GSM specifications. More will be obtained after the wafer testing.
低噪声放大器(LNA)和混频器(Mixer)是无线通信射频接收机中不可缺少的关键电路。近年来，随着无线通讯由第二代(2G)标准向第三代(3G)标准过渡，系统对芯片的噪声系数和线性度等指标提出了更高的要求。同时，为了满足产品化后高可靠性和低成本的要求，芯片需要高集成度，因此射频接收机必须单芯片实现。
本文介绍了LNA和Mixer的基本原理以及几种常见的LNA和Mixer结构，并对各种结构的优缺点作了阐述。针对目前LNA和Mixer中应用最为广泛的源极电感负反馈LNA和CMOS开关型Gilbert混频器，文章作了较为详细的分析。在此基础上，文中对这两种结构进行了优化，提出了全差分电感负反馈LNA结构和低压Gilbert混频器结构。该优化的结构扬原有电感负反馈LNA和Gilbert混频器电路之长，避其之短，解决了LNA电路中电感失配的影响，Gilbert混频器电路中电源电压高、线性度低的问题。
CMOS工艺的电感和MOS管噪声是设计LNA和Mixer时需要考虑的非常重要的问题。本文专门介绍了电感的模型、品质因数以及自谐振频率，介绍了MOS管的射频和噪声模型以及其最新发展，讨论了模型的选择对设计结果的影响。
文章根据GSM接收机标准给出了基于0.6μmCMOS工艺、采用全差分电感负反馈结构的LNA和低压Gilbert结构混频器完整的电路设计、模拟结果和版图设计。模拟结果表明，采用该方案的LNA和Mixer基本达到了GSM的设计标准。更进一步的结果有待于芯片制作完成后的功能测试。
With the development of the technology of wireless communication in recent decades, people have basicly realized the dream of communication anywhere and anytime. At the same time, the demand for high-performance and large-capability wireless communication systems has been on a great upsurge. Under such circumstances, researches in the field of radio and wireless communication IC become more and more heated. Now all kinds of wireless communication standard exists, but GSM system share the biggest market. Thus, it is important to research and design radio IC according GSM standard.
Low noise amplifier(LNA) and Mixer is the key component in radio transceiver. As the standard of wireless communication upgrades from the second generation to the third generation in recent years, the performance such as noise figure(NF) and linearity of IC must be promoted. Simultaneously, in order to satisfy product's high performance and low cost, chips need a higher intergration. Therefore, radio transceiver must be fully monolithic integration.
This paper introduces the fundamentals of LNA and Mixer, withing some common structure as well as their merits and demerits given out. The paper also gives a detailed analysis of the LNA with source inductor degeneration and CMOS commutating Gilbert Mixer, which are currently the most widely used. Based on the analysis, an optimized full differential inductor degeneration LNA and low voltage Gilbert Mixer is presented. This type of LNA and Mixer enjoys the advantages of the anterior LNA and Mixer, while resolves the problem of inductor's mismatch and mixer's high power voltage and low linearity.
The inductor per se in CMOS process and the MOSFET's noise is an important issue in designing LNA and Mixer. This thesis specially introduced the inductor's modeling and the MOSFET's radio and noise model, and discussed the simulation result under the influence of different model.
The final part of the paper presents a LNA and Mixer chip fabricated in 0.6 m CMOS technology used for GSM system. The simulation results and the layout design are provided . The results indicate that this cascade LNA and Mixer is compliant with GSM specifications. More will be obtained after the wafer testing.
引文
[1] B. Razavi. Design of Analog CMOS Integrated Circuits. New York: McGraw-Hill, 2001, 1-50
[2] T.H.Lee. The Design of CMOS Radio-Frequency Integrated Circuits.北京: 电子工业出版社, 1998, 1-50
[3] P.R.Gray, P.J.Hurst, S.H.Lewis and R.G.Meyer. Analysis and Design of Analog Integrated Circuits. 4th edition, New York: John Wiley&Sons, 2001, 1-50
[4] A．B．格里本著，邵传芬译．双极与MOS模拟集成电路设计．上海：上海交通大学出版社，1989，1-50
[5] 张肃文，陆兆熊编．高频电子线路．北京：高等教育出版社，1993．1-50
[6] B. Razavi. RF microelectronics. New Jersey: Prentice-Hall, 1998, 113-114
[7] Jan Crols and M.Steyaert. CMOS wireless transceiver design. London: Kluwer Academic-Publishers, 1997, 108-111
[8] R.Aparicio and A.Hajimiri. Capacity Limits and Matching Properties of Intergrated Capacitors. IEEE Journal of Solid-State Circuits, 2002, 37(3): 384-393
[9] N.M.Nguyen and R.G.Meyer. Si IC-compatible inductors and LC passive filters. IEEE Journal of Solid-State Circuits, 1990, 25(8): 1028-1031
[10] A.Zolfaghari et al.Stacked Inductors and Transformers in CMOS Technology. IEEE Journal of Solid-State Circuits, 2001, 36(4): 620-628
[11] Chih-Chun Tang et al. Miniature 3-D Inductors in Standard CMOS Process. IEEE Journal of Solid-State Circuits, 2002, 37(4): 471-480
[12] C.P.Yue , S.S.Wong. Physical Modeling of Spiral Inductors on Silicon. IEEE Transactions on Electron Decives, 2000, 47(3): 560-567
[13] S S.Mohan et al. Simple Accurate Expressions for Planar Spiral Inductance. IEEE Journal of Solid-State Circuits, 1999, 34(10): 1419-1424
[14] H M.Greenhouse. Design of planar rectangular microelectronic inductors. IEEE Trans.Parts;Hybrids, Packing, 1974, PHP- 10(6): 101-109
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[16] A.M.Niknejad, R.G.Meyer. lnduetors and Transformers for Si RF ICs. London: Kluwer Academic Publishers, 2002, 1-50
[17] J N.Burghartz, D C.Edelstein, M.Soyuer et al. RF circuit design aspects of spiral
inductors on silicon. IEEE Journal of Solid-State Circuits, 1998, 33(12): 2028-2033
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[20] J R.Long, M A.Copeland. The Modeling, Characterization, and Design of Monolithic Inductors for Silicon RF IC's, IEEE Journal of Solid-State Circuits, 1997, 32(3): 357-369
[21] C. Enz, Y. Cheng. MOS Transistor Modeling for RF IC Design. IEEE Transactions on Solid-State Circuits, 2000, 35(2): 186-201
[22] M. J. Deen, C. H. Chen and Y. Cheng. MOSFET Modeling for Low Noise, RF Circuit Design. IEEE CICC 2002, Orlando, Florida. http://www.ece., mcmaster.ca/faculty/deen/Conference Presentations/cicc 02.pdf, 2002
[23] C. H. Chen. NOISE CHARACTERIZATION AND MODELING OF MOSFETS FOR RF IC APPLICATIONS. Ph.D dissertation, 2002, 1-50 www.ece.mcmaster.ca/～chihhung/Publication/PhDThesis_CHChen.pdf, 2002
[24] J. S. Goo. HIGH FREQUENCY NOISE IN CMOS LOW NOISE AMPLIFIERS. Ph.D dissertation, 1998. www, tcad.stanford.edu/tcad/pubs/theses/goo.pdf, 1998
[25] Gerhard Knoblinger. Thermal Channel Noise of quarter and sub-quarter micron NMOS FET's.2000 www.unibw-muenchen.de/campus/ET4/publikationen/knob200.pdf, 2000
[26] bsim430mannual, http://www-device.eecs.berkeley.edu/～bsim3/bsim4.html
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[28] Y.Tsividis, K. Suyama. MOSFET modeling for Analog circuit CAD:Problems and Prospects. IEEE Journal of Solid-State Circuits, 1994, 29(3):210-216
[29] Y.Tsividis, K.Suyama, and K.Vavelidis, Simple 'reconciliation' MOSFET model valid in all regions. Electron Letter, 1995, 3:506
[30] R P. Jindal. Hot-Electron Effects on Channel Thermal Noise in Fine-Line NMOS Field-Effect Transistor. IEEE Transactions on Electron Devices, 1986, 33(9), 1395
[31] Kelvin Boo-Huat Khoo. programmable, high-dynamic range sigma-delta, A/D converters for multistand, fully-integrated RF receivers. Ph.D dissertation 1998
http://kabuki.eecs.berkeley.edu/～kelvink/thesis/thesis.pdf,1998
[32] D. K. Shaeffer. The Design and Implementation of Low-Power CMOS Radio Receivers, Ph.D dissertation,1998 www-smirc.stanford.edu/papers/Thesis-derek.pdf,1998
[33] Su Tarn Lim. Distortion Analysis of a LNA. www.eecg.toronto.edu/～kphang/papers/2001/lim dist.pdf, 2002
[34] Wei Guo. The Noise and Linearity Optimization for A 1.9-GHz CMOS Low Noise Amplifier. www.ap-asic.org/2002/proceedings/5A/5A-3.PDF, 2002
[35] 陈志恒．射频集成电路设计讲义．http://iroi.seu.edu.cn/teachers/james/rfic.htm, 2002
[36] D. K. Shaeffer, T. H. Lee. A 1.5-V 1.5-GHz CMOS low-noise amplifier. IEEE Journal of Solid-State Circuits, 1997,32(5): 745-759
[37] A. Rofougaran et al. A Single-Chip 900-MHz Spread-Spectrum Wireless Transceiver in 1-um CMOS-Part Ⅱ: Receiver Design. IEEE Journal of Solid-State Circuits, 1998,33(4): 535-547
[38] S. Wu, B. Razavi. A 900-MHz/1.8-GHz CMOS Receiver for Dual-Band Applications. IEEE Journal of Solid-State Circuits,1998,33(10): 2178-2185
[39] Q. Huang et al. GSM Transceiver Front-End Circuits in 0.25-urn CMOS. IEEE Journal of Solid-State Circuits, 1999,34(3):292-303
[40] H. Darabi , A. A. Abidi. A 4.5-mw 900-MHz CMOS Receiver for Wireless Paging. IEEE Journal of Solid-State Circuits,2000,35(5): 1085-1096
[41] F. Svelto et al. Implementation of a CMOS LNA Plus Mixer for GPS Applications with No External Components. IEEE Transactions on VLSI Systems, 2001, 9(1): 100
[42] E. A. Allam et al. Low-Voltage 1.9-GHZ Front-End Receiver in 0.5-urn CMOS Technology. IEEE Journal of Solid-State Circuits,2001,36(10): 1434-1443
[43] F. Gatta et al. A 2-dB Noise Figure 900-MHz Differential CMOS LNA. IEEE Journal of Solid-State Circuits,2001,36(10): 1444-1452
[44] S. Tadjpour et al. A 900-MHz Dual-Conversion Low-IF GSM Receiver in 0.35- CMOS. IEEE Journal of Solid-State Circuits,2001,36(12): 1992-2002
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[57] D Manstretta,M.Brandolini and Francesco.Svelto.Second-Order Intermodulation Mechanisms in CMOS Downconverters. IEEE Journal of Solid-State Circuits,2003,38(3): 394-398
[58] K L.Fong,R G.Meyer. Monolithic RF Active Mixer Design. IEEE Transactions on Circuits and Systems-Ⅱ:Analog and Digital Signal Processing, 1999,46(3): 231-240
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[60] 陈迪平．模拟集成电路设计讲义．http://physics.hnu.net,cn/,2003
[2] T.H.Lee. The Design of CMOS Radio-Frequency Integrated Circuits.北京: 电子工业出版社, 1998, 1-50
[3] P.R.Gray, P.J.Hurst, S.H.Lewis and R.G.Meyer. Analysis and Design of Analog Integrated Circuits. 4th edition, New York: John Wiley&Sons, 2001, 1-50
[4] A．B．格里本著，邵传芬译．双极与MOS模拟集成电路设计．上海：上海交通大学出版社，1989，1-50
[5] 张肃文，陆兆熊编．高频电子线路．北京：高等教育出版社，1993．1-50
[6] B. Razavi. RF microelectronics. New Jersey: Prentice-Hall, 1998, 113-114
[7] Jan Crols and M.Steyaert. CMOS wireless transceiver design. London: Kluwer Academic-Publishers, 1997, 108-111
[8] R.Aparicio and A.Hajimiri. Capacity Limits and Matching Properties of Intergrated Capacitors. IEEE Journal of Solid-State Circuits, 2002, 37(3): 384-393
[9] N.M.Nguyen and R.G.Meyer. Si IC-compatible inductors and LC passive filters. IEEE Journal of Solid-State Circuits, 1990, 25(8): 1028-1031
[10] A.Zolfaghari et al.Stacked Inductors and Transformers in CMOS Technology. IEEE Journal of Solid-State Circuits, 2001, 36(4): 620-628
[11] Chih-Chun Tang et al. Miniature 3-D Inductors in Standard CMOS Process. IEEE Journal of Solid-State Circuits, 2002, 37(4): 471-480
[12] C.P.Yue , S.S.Wong. Physical Modeling of Spiral Inductors on Silicon. IEEE Transactions on Electron Decives, 2000, 47(3): 560-567
[13] S S.Mohan et al. Simple Accurate Expressions for Planar Spiral Inductance. IEEE Journal of Solid-State Circuits, 1999, 34(10): 1419-1424
[14] H M.Greenhouse. Design of planar rectangular microelectronic inductors. IEEE Trans.Parts;Hybrids, Packing, 1974, PHP- 10(6): 101-109
[15] C.P.Yue, S.S.Wong. On-Chip Spiral Inductors with Patterned Ground Shields for Si-Based RF IC's. IEEE Journal of Solid-State Circuits, 1998, 33(5): 743-752
[16] A.M.Niknejad, R.G.Meyer. lnduetors and Transformers for Si RF ICs. London: Kluwer Academic Publishers, 2002, 1-50
[17] J N.Burghartz, D C.Edelstein, M.Soyuer et al. RF circuit design aspects of spiral
inductors on silicon. IEEE Journal of Solid-State Circuits, 1998, 33(12): 2028-2033
[18] Y Cao, R A, Groves, N D.Zamdmer, J O.Plouchart et al. Frequency-Independent Equivalent Circuit Model for On-chip Spiral Inductors. www.gigascale.org/pubs/196/CICC02yu.pdf, 2003
[19] A.M.Niknejad , R.G. Meyer. Analysis, Design, and Optimization of Spiral Inductors and Transformers for Si RF ICs. IEEE Journal of Solid-State Circuits, 1998, 33(10): 1470-1481
[20] J R.Long, M A.Copeland. The Modeling, Characterization, and Design of Monolithic Inductors for Silicon RF IC's, IEEE Journal of Solid-State Circuits, 1997, 32(3): 357-369
[21] C. Enz, Y. Cheng. MOS Transistor Modeling for RF IC Design. IEEE Transactions on Solid-State Circuits, 2000, 35(2): 186-201
[22] M. J. Deen, C. H. Chen and Y. Cheng. MOSFET Modeling for Low Noise, RF Circuit Design. IEEE CICC 2002, Orlando, Florida. http://www.ece., mcmaster.ca/faculty/deen/Conference Presentations/cicc 02.pdf, 2002
[23] C. H. Chen. NOISE CHARACTERIZATION AND MODELING OF MOSFETS FOR RF IC APPLICATIONS. Ph.D dissertation, 2002, 1-50 www.ece.mcmaster.ca/～chihhung/Publication/PhDThesis_CHChen.pdf, 2002
[24] J. S. Goo. HIGH FREQUENCY NOISE IN CMOS LOW NOISE AMPLIFIERS. Ph.D dissertation, 1998. www, tcad.stanford.edu/tcad/pubs/theses/goo.pdf, 1998
[25] Gerhard Knoblinger. Thermal Channel Noise of quarter and sub-quarter micron NMOS FET's.2000 www.unibw-muenchen.de/campus/ET4/publikationen/knob200.pdf, 2000
[26] bsim430mannual, http://www-device.eecs.berkeley.edu/～bsim3/bsim4.html
[27] Y．P．希维迪斯著，叶金官译．MOS管的工作原理及建模．西安：西安交通大学出版社，1989，1-50
[28] Y.Tsividis, K. Suyama. MOSFET modeling for Analog circuit CAD:Problems and Prospects. IEEE Journal of Solid-State Circuits, 1994, 29(3):210-216
[29] Y.Tsividis, K.Suyama, and K.Vavelidis, Simple 'reconciliation' MOSFET model valid in all regions. Electron Letter, 1995, 3:506
[30] R P. Jindal. Hot-Electron Effects on Channel Thermal Noise in Fine-Line NMOS Field-Effect Transistor. IEEE Transactions on Electron Devices, 1986, 33(9), 1395
[31] Kelvin Boo-Huat Khoo. programmable, high-dynamic range sigma-delta, A/D converters for multistand, fully-integrated RF receivers. Ph.D dissertation 1998
http://kabuki.eecs.berkeley.edu/～kelvink/thesis/thesis.pdf,1998
[32] D. K. Shaeffer. The Design and Implementation of Low-Power CMOS Radio Receivers, Ph.D dissertation,1998 www-smirc.stanford.edu/papers/Thesis-derek.pdf,1998
[33] Su Tarn Lim. Distortion Analysis of a LNA. www.eecg.toronto.edu/～kphang/papers/2001/lim dist.pdf, 2002
[34] Wei Guo. The Noise and Linearity Optimization for A 1.9-GHz CMOS Low Noise Amplifier. www.ap-asic.org/2002/proceedings/5A/5A-3.PDF, 2002
[35] 陈志恒．射频集成电路设计讲义．http://iroi.seu.edu.cn/teachers/james/rfic.htm, 2002
[36] D. K. Shaeffer, T. H. Lee. A 1.5-V 1.5-GHz CMOS low-noise amplifier. IEEE Journal of Solid-State Circuits, 1997,32(5): 745-759
[37] A. Rofougaran et al. A Single-Chip 900-MHz Spread-Spectrum Wireless Transceiver in 1-um CMOS-Part Ⅱ: Receiver Design. IEEE Journal of Solid-State Circuits, 1998,33(4): 535-547
[38] S. Wu, B. Razavi. A 900-MHz/1.8-GHz CMOS Receiver for Dual-Band Applications. IEEE Journal of Solid-State Circuits,1998,33(10): 2178-2185
[39] Q. Huang et al. GSM Transceiver Front-End Circuits in 0.25-urn CMOS. IEEE Journal of Solid-State Circuits, 1999,34(3):292-303
[40] H. Darabi , A. A. Abidi. A 4.5-mw 900-MHz CMOS Receiver for Wireless Paging. IEEE Journal of Solid-State Circuits,2000,35(5): 1085-1096
[41] F. Svelto et al. Implementation of a CMOS LNA Plus Mixer for GPS Applications with No External Components. IEEE Transactions on VLSI Systems, 2001, 9(1): 100
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