基于FPGA的中频数字化若干关键算法的实现研究
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摘要
软件无线电技术自20世纪90年代提出以后,在许多通信系统中得到了广泛应用。本文研究了一种软件无线电数字通信系统方案的设计,并着重研究了其中中频处理单元的设计和实现。针对实际应用,本文提出了一个基于FPGA和DSP的软件无线电中频/基带数字化处理系统的设计方案。该系统的特点是所有的中频信号处理算法全部由软件实现,它主要包括高速A/D、超大规模FPGA芯片、高速DSP芯片和外部存储器等,其中超大规模FPGA芯片和高速的DSP芯片是系统的核心。DSP芯片采用的是TI公司的C6416,FPGA芯片采用的是Xilinx公司的XC2V2000FG676,既兼顾速度和灵活性,又具有较强的通用性。
本文根据“基于FPGA的中频数字化处理平台的建立及若干关键算法的实现”研究课题,主要完成了软件无线电通信系统中频数字化若干关键算法实现的任务,具体包括通用数字中频板的设计、中频板上FPGA和DSP、D/A的接口设计、各种数字通信关键技术(数字上/下变频、调制解调、信道编译码、交织解交织等)的FPGA实现。本文研究的系统分别在Matlab、ISE、Modelsim、Visual DSP++、ChipScope Pro等软件中进行了仿真和验证,并已交付使用。结果表明,本文提出的方案正确可行,达到了预定要求。本文的工作对其它软件无线电系统的实现也具有较大的参考价值。
The technique of Software Defined Radio has been applied widely once it was provided in 90th. A design for SDR commuanication ststem was investigated in this paper. Design and realization of IF unit were investigated with more attentions. Given the practical application, a digital IF/BB process platform based on FPGA and DSP was put forward in the paper. The excellence of FPGA and DSP could be joined by the platform. The characteristic of this architecture was all the IF signal process arithmetics were realized by software. The platform mainly included high speed A/D, very large scale FPGA, high speed DSP, external memory, and so on. FPGA and DSP was the core of the system. The DSP C6416 and FPGA XC2V2000FG676 were adopted in the system. It could both give attention to the speed and agility.
Research on the establish of digital IF process platform based on FPGA and DSP and the realization of several key arithmetics were provided in this paper, IF digitization of new SDR communication module and the realization of several key arithmetics were accomplished. It included design of the universal digital IF circuit, the interface of FPGA and DSP, A/D, the realization of digital communication key techniques (digital up/down convertion, modulation and demodulation, channel encoding and decoding, interleaving and deinterleaving) based on FPGA. The system has been simulated and validated in software such as Matlab, ISE, Modelsim, Visual DSP++, ChipScope Pro and so on. The system has been used. The result indicated that the scheme introduced in the paper was right and it has reached the request. The work in the paper had important reference value for realization of other SDR system.
本文根据“基于FPGA的中频数字化处理平台的建立及若干关键算法的实现”研究课题,主要完成了软件无线电通信系统中频数字化若干关键算法实现的任务,具体包括通用数字中频板的设计、中频板上FPGA和DSP、D/A的接口设计、各种数字通信关键技术(数字上/下变频、调制解调、信道编译码、交织解交织等)的FPGA实现。本文研究的系统分别在Matlab、ISE、Modelsim、Visual DSP++、ChipScope Pro等软件中进行了仿真和验证,并已交付使用。结果表明,本文提出的方案正确可行,达到了预定要求。本文的工作对其它软件无线电系统的实现也具有较大的参考价值。
The technique of Software Defined Radio has been applied widely once it was provided in 90th. A design for SDR commuanication ststem was investigated in this paper. Design and realization of IF unit were investigated with more attentions. Given the practical application, a digital IF/BB process platform based on FPGA and DSP was put forward in the paper. The excellence of FPGA and DSP could be joined by the platform. The characteristic of this architecture was all the IF signal process arithmetics were realized by software. The platform mainly included high speed A/D, very large scale FPGA, high speed DSP, external memory, and so on. FPGA and DSP was the core of the system. The DSP C6416 and FPGA XC2V2000FG676 were adopted in the system. It could both give attention to the speed and agility.
Research on the establish of digital IF process platform based on FPGA and DSP and the realization of several key arithmetics were provided in this paper, IF digitization of new SDR communication module and the realization of several key arithmetics were accomplished. It included design of the universal digital IF circuit, the interface of FPGA and DSP, A/D, the realization of digital communication key techniques (digital up/down convertion, modulation and demodulation, channel encoding and decoding, interleaving and deinterleaving) based on FPGA. The system has been simulated and validated in software such as Matlab, ISE, Modelsim, Visual DSP++, ChipScope Pro and so on. The system has been used. The result indicated that the scheme introduced in the paper was right and it has reached the request. The work in the paper had important reference value for realization of other SDR system.
引文
[1] Joseph Mitola, Software Radio Architecture, John Wiley & Sons, 2000
[2] 李晓陆,软件无线电及其特性,舰船电子工程,2005,25(4):35-37
[3] 孙雷,短波在无线电通信中的作用及特点,信息技术,2005,(5):86-88
[4] 中国人民解放军总装备部,短波通信技术,北京,国防工业出版社,2002
[5] JTRS Joint Program Office, Software Communications Architecture Rev3.0,2004
[6] 张剑峰,马叶峰,软件无线电及 SCA 简介,通信与广播电视,2006,(1):9-13,23
[7] 田孝华,孙晓艳,软件无线电接收通道关键技术分析与应用,西安外事学院学报,2006,2(1):99-104
[8] 汪汉新,张翔,中频数字化软件无线电技术的研究,中南民族大学学报(自然科学版),2005,24(3):51-53,57
[9] 周学科,张太镒,王小军,基于软件无线电的短波中频数字化,重庆邮电学院学报,2004,16(4):34-37
[10] Dick C, Harris F. FPGA DSPs-the platform for NG wireless communications,R.F. Design, 2000, 23(10): 56-66
[11] Sungbin Im, Woncheol Lee, Chonghoon Kim, etal. Implementation of SDR-based digital IF channelizer/de-channelizer for multiple CDMA signals,IEICE Transactions on Communications, 2000, E83-B(6):1282-1289
[12] 王凤瑛,郭俊强,朱建磊,软件无线电系统中 ADC 的应用权衡,山东交通学院学报,2006,14(2):75-77
[13] 张 强 , 数 字 上 变 频 在 中 频 数 字 化 中 的 应 用 , 火 控 雷 达 技 术 , 2003,32(2):12-16
[14] 马云,邱兆坤,黄小红,等,宽带雷达接收机数字下变频技术研究,现代雷达,2005,27(10):72-74
[15] 许若圣,周依林,基于软件无线电的数字下变频设计,电子技术应用,2006,(4):123-126
[16] Wagle K, Dharia A. The ups and downs of digital data conversion, EE Evaluation Engineering, 2006, 45(5): 32,34-36
[17] 胡广书,数字信号处理-理论、算法与实现,北京,清华大学出版社,1997:117-127
[18] R.E.Crochiere, L.R.Rabiner, Multirate Digital Signal Processing, 1983
[19] 曾文海,刘奕,抽样频率转换在数字下变频中的应用,信息技术,2006,(1):89-90,113
[20] EDA 先锋工作室, Xilinx ISE 5.x 详解,人民邮电出版社, 2003
[21] Samir Palnitkar,Verilog HDL:A Guide to Digital Design and Synthesis,2003
[22] J.Bhasker, Verilog HDL Synthesis:A Practical Primer, 1998
[23] 王永纲,高速上下变频 FIR 滤波器的 FPGA 设计,数据采集与处理,2005,20(2):166-169
[24] 邱兆坤,马云,王伟,等,基于 FPGA 的数字化解调接收机最优设计,电子与信息学报,2006,28(1):41-44
[25] Salim T, Devlin J, Whittington J, etal. An efficient serial distributed arithmetic algorithm for FPGA implementation of digital up conversion,Complexity, 2005, 11(1): 24-29
[26] Pasko R, Rijnders L, Schaumont PR, etal. High-performance/flexible all-digital quadrature up and down converter chip, IEEE Journal of Solid-State Circuits, 2001, 36(3): 408-416
[27] Hawley R A,Wong B C,Lin T,etal. Design techniques for silicon compiler implementation of high speed FIR digital filters, IEEE Journal of Solid State Circuits,1996,31(5):656-661
[28] 李笠,张金密,张睿,等,基于 FPGA 的数字滤波器模块化研究,电子元器件应用,2006,(5):78-81
[29] 杨小牛,楼才义,徐建良,软件无线电原理与应用,北京,电子工业出版社,2001:28-30
[30] 朱宇,卫国,朱近康,基于时分处理的 FIR 内插滤波器的设计与实现,无线通信技术,2002,11(1):33-36,39
[31] 陈雁,用 MATLAB 设计及 FPGA 实现 FIR 滤波器的方法,计算机仿真,2003,(12):144-146
[32] Jouko Vakka,Direct Digital Synthesizers:Theory,Design and Application ,Helsinki University of Technology,2000
[33] 王新梅,肖国镇,纠错码-原理与方法,西安,西安电子科技大学出版社, 2001:378-415,443-503
[34] 傅文羽,汤建勋,张广发,具有平稳随机性质的带限高斯白噪声发生器,计量与测试技术,2001,(3):32-33
[35] 王永生,梅杓春,用单片机产生有限带宽伪随机信号,南京邮电学院学报, 1994,14(4):87-91
[36] 马飞,谢建菲,通信系统的交织器技术,兵工自动化,2006,25(4):33 -34,43
[37] 李雪华,纠错编码系统交织器的设计,无线电通信技术,2004,30(3):23-25
[38] 叶宇煌,蒲建发,基于 FPGA 的交织器的设计与实现,福州大学学报(自然科学版),2003,31(6):656-658,668
[39] 张子敬,焦李成,余弦调制滤波器组的原型滤波器设计,电子与信息学报,2002,24(3):308-313
[40] 高西奇,祁俊,何振亚,任意长度线性相位余弦调制滤波器组的快速实现,电子学报,1999,27(10):43-46
[41] 石彦丛,燕延,基于软件无线电的 BPSK、 DPSK 信号解调技术,石家庄铁道学院学报,2002,15(2):37-39
[42] 王刚,刘毅鹏, BPSK 载波同步的研究,通信技术,2003,(1):21-22
[2] 李晓陆,软件无线电及其特性,舰船电子工程,2005,25(4):35-37
[3] 孙雷,短波在无线电通信中的作用及特点,信息技术,2005,(5):86-88
[4] 中国人民解放军总装备部,短波通信技术,北京,国防工业出版社,2002
[5] JTRS Joint Program Office, Software Communications Architecture Rev3.0,2004
[6] 张剑峰,马叶峰,软件无线电及 SCA 简介,通信与广播电视,2006,(1):9-13,23
[7] 田孝华,孙晓艳,软件无线电接收通道关键技术分析与应用,西安外事学院学报,2006,2(1):99-104
[8] 汪汉新,张翔,中频数字化软件无线电技术的研究,中南民族大学学报(自然科学版),2005,24(3):51-53,57
[9] 周学科,张太镒,王小军,基于软件无线电的短波中频数字化,重庆邮电学院学报,2004,16(4):34-37
[10] Dick C, Harris F. FPGA DSPs-the platform for NG wireless communications,R.F. Design, 2000, 23(10): 56-66
[11] Sungbin Im, Woncheol Lee, Chonghoon Kim, etal. Implementation of SDR-based digital IF channelizer/de-channelizer for multiple CDMA signals,IEICE Transactions on Communications, 2000, E83-B(6):1282-1289
[12] 王凤瑛,郭俊强,朱建磊,软件无线电系统中 ADC 的应用权衡,山东交通学院学报,2006,14(2):75-77
[13] 张 强 , 数 字 上 变 频 在 中 频 数 字 化 中 的 应 用 , 火 控 雷 达 技 术 , 2003,32(2):12-16
[14] 马云,邱兆坤,黄小红,等,宽带雷达接收机数字下变频技术研究,现代雷达,2005,27(10):72-74
[15] 许若圣,周依林,基于软件无线电的数字下变频设计,电子技术应用,2006,(4):123-126
[16] Wagle K, Dharia A. The ups and downs of digital data conversion, EE Evaluation Engineering, 2006, 45(5): 32,34-36
[17] 胡广书,数字信号处理-理论、算法与实现,北京,清华大学出版社,1997:117-127
[18] R.E.Crochiere, L.R.Rabiner, Multirate Digital Signal Processing, 1983
[19] 曾文海,刘奕,抽样频率转换在数字下变频中的应用,信息技术,2006,(1):89-90,113
[20] EDA 先锋工作室, Xilinx ISE 5.x 详解,人民邮电出版社, 2003
[21] Samir Palnitkar,Verilog HDL:A Guide to Digital Design and Synthesis,2003
[22] J.Bhasker, Verilog HDL Synthesis:A Practical Primer, 1998
[23] 王永纲,高速上下变频 FIR 滤波器的 FPGA 设计,数据采集与处理,2005,20(2):166-169
[24] 邱兆坤,马云,王伟,等,基于 FPGA 的数字化解调接收机最优设计,电子与信息学报,2006,28(1):41-44
[25] Salim T, Devlin J, Whittington J, etal. An efficient serial distributed arithmetic algorithm for FPGA implementation of digital up conversion,Complexity, 2005, 11(1): 24-29
[26] Pasko R, Rijnders L, Schaumont PR, etal. High-performance/flexible all-digital quadrature up and down converter chip, IEEE Journal of Solid-State Circuits, 2001, 36(3): 408-416
[27] Hawley R A,Wong B C,Lin T,etal. Design techniques for silicon compiler implementation of high speed FIR digital filters, IEEE Journal of Solid State Circuits,1996,31(5):656-661
[28] 李笠,张金密,张睿,等,基于 FPGA 的数字滤波器模块化研究,电子元器件应用,2006,(5):78-81
[29] 杨小牛,楼才义,徐建良,软件无线电原理与应用,北京,电子工业出版社,2001:28-30
[30] 朱宇,卫国,朱近康,基于时分处理的 FIR 内插滤波器的设计与实现,无线通信技术,2002,11(1):33-36,39
[31] 陈雁,用 MATLAB 设计及 FPGA 实现 FIR 滤波器的方法,计算机仿真,2003,(12):144-146
[32] Jouko Vakka,Direct Digital Synthesizers:Theory,Design and Application ,Helsinki University of Technology,2000
[33] 王新梅,肖国镇,纠错码-原理与方法,西安,西安电子科技大学出版社, 2001:378-415,443-503
[34] 傅文羽,汤建勋,张广发,具有平稳随机性质的带限高斯白噪声发生器,计量与测试技术,2001,(3):32-33
[35] 王永生,梅杓春,用单片机产生有限带宽伪随机信号,南京邮电学院学报, 1994,14(4):87-91
[36] 马飞,谢建菲,通信系统的交织器技术,兵工自动化,2006,25(4):33 -34,43
[37] 李雪华,纠错编码系统交织器的设计,无线电通信技术,2004,30(3):23-25
[38] 叶宇煌,蒲建发,基于 FPGA 的交织器的设计与实现,福州大学学报(自然科学版),2003,31(6):656-658,668
[39] 张子敬,焦李成,余弦调制滤波器组的原型滤波器设计,电子与信息学报,2002,24(3):308-313
[40] 高西奇,祁俊,何振亚,任意长度线性相位余弦调制滤波器组的快速实现,电子学报,1999,27(10):43-46
[41] 石彦丛,燕延,基于软件无线电的 BPSK、 DPSK 信号解调技术,石家庄铁道学院学报,2002,15(2):37-39
[42] 王刚,刘毅鹏, BPSK 载波同步的研究,通信技术,2003,(1):21-22