基于CCSDSAOS和FPGA的高速可配置复接器设计
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摘要
本文在研究AOS网络及数据链路规范的基础上,根据航天工程中地面测试的实际需要,提出了高速可配置复接器的设计思想。采用AOS中的虚拟信道协议数据单元、异步复用、差错控制、伪随机化等技术规范,完成基于FPGA高速可配置复接器的设计方案。在对整个设计方案进行仿真验证并确认其性能达到设计指标后,设计了高速可配置复接器硬件电路,并搭建了由信源、信宿、指令源组成的测试验证平台,对高速可配置复接器的功能、性能进行测试。
实验结果显示,在144Mbps的速率下,高速可配置复接器能够正确复接六路数据并形成符合CADU格式的数据流,并且在配置指令的控制下正确改变复接器的参数和状态,所得结果与设计目标完全一致。
In this dissertation, the design idea of the high-rate configurable multiplexer, which is based on the recommendation for Advanced Orbiting Systems networks and data links, is set for practical requirements of ground testing in aerospace engineering. Technical specifications such as virtual channel protocol data unit,asynchronous multiplexing, error control and pseudo-randomizing are adopted and the high-rate configurable multiplexer is designed on FPGA device. The design has been simulated and its performance has been confirmed before high-rate configurable multiplexer hardware platform is established. Finally, a testing system, which includes data source, data receiving equipment and the instruction source, is built to validate the function and the performance of the multiplexer.
The results of experiment indicate that at the data transmission rate of 144Mbps, high-rate configurable multiplexer can not only multiplex six channels asynchronous data correctly and format the data stream with CADU form, but also change its parameters and states by the control of configuring instructions. The result is quite consistent with the design requirement.
实验结果显示,在144Mbps的速率下,高速可配置复接器能够正确复接六路数据并形成符合CADU格式的数据流,并且在配置指令的控制下正确改变复接器的参数和状态,所得结果与设计目标完全一致。
In this dissertation, the design idea of the high-rate configurable multiplexer, which is based on the recommendation for Advanced Orbiting Systems networks and data links, is set for practical requirements of ground testing in aerospace engineering. Technical specifications such as virtual channel protocol data unit,asynchronous multiplexing, error control and pseudo-randomizing are adopted and the high-rate configurable multiplexer is designed on FPGA device. The design has been simulated and its performance has been confirmed before high-rate configurable multiplexer hardware platform is established. Finally, a testing system, which includes data source, data receiving equipment and the instruction source, is built to validate the function and the performance of the multiplexer.
The results of experiment indicate that at the data transmission rate of 144Mbps, high-rate configurable multiplexer can not only multiplex six channels asynchronous data correctly and format the data stream with CADU form, but also change its parameters and states by the control of configuring instructions. The result is quite consistent with the design requirement.
引文
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[26]毛继志,李建周. 基于FPGA和LVDS的AOS高速合路器/分路器研究. 计算机工程与设计,2005(30):137-139.
[27]潘松,黄继业. EDA技术实用教程. 第2版. 北京:科学出版社,2005.
[28]崔隆,张尔扬. CCSDS高级在轨系统复接业务性能的分析. 宇航学报,1997(18-3):101-104.
[2]周林. 国际空间站哥伦布舱信息系统研究. 空间电子技术,2006(5):2-5.
[3]孙辉先,陈小敏. Cluster卫星的数据管理系统. 中国空间科学学会空间探测专业委员会第十三次学术会议论文集,2000:112-116.
[4]朱爱军. 风云三号气象卫星数据传输体制分析. 应用气象学报,2006(17-4):494-497.
[5] http://www.cssar.ac.cn/website/research/work02.htm#03
[6]周乾南. 空间数据系统咨询委员会(CCSDS)的建议和报告. 电信资料,2003(3):13-14.
[7]黄薇,张纪生. CCSDS AOS建议介绍. 飞行器测控学报,2000(19-3):37-45.
[8]CCSDS. Advanced Orbiting Systems,Networks and Data Links:Architectural Specification. CCSDS 701.0-B-3 Blue Book,2001.
[9]郑波. 空间高速数传链路中虚拟信道动态管理的研究. 中国空间技术研究院硕士学位论文,1999:10-11.
[10]公绪晓,白云飞. 利用高级在轨系统实现高速同/异步混合复接. 计算机工程与设计,2006(27-19):3634-3637.
[11]CCSDS. Advanced Orbiting Systems,Networks and Data Links:Summery of Concept,Rational and Performance. CCSDS 700.0-G-3 Green Book,1992.
[12]XILINX. Asynchronous FIFO. Xilinx LogiCORE,2004.
[13]王诚,薛小刚等. FPGA/CPLD设计工具——Xilinx ISE 5.x使用详解. 第1版. 北京:人民邮电出版社,2004. 3-5.
[14]张炜,王莹等. 基于CCSDS高级在轨系统的遥科学空间通信链路结构研究. 宇航学报,1999(20-3):112-117.
[15]左莉华. 高级在轨系统(AOS)数据传送与分路方式. 遥测遥控,1993(6):28-33.
[16]姜宏旭. 电路设计与制板——PowerLogic 5.0 & PowerPCB 5.0典型实例. 第1版. 北京:人民邮电出版社,2005.
[17]XILINX. Virtex-4 Data Sheet. 2006.
[18]TI. 3V to 6V Input,6A Output Synchronous Buck PWM Switcher with Integrated FETs. 2003.
[19]韩江涛,胡庆生等. 基于TPS54610的FPGA供电模块设计. 电子技术应用,2006(10):114-117.
[20]MAXIM. ±15kV ESD-Protected,Down to 10nA,3.0V to 5.5V,Up to 1Mbps,True RS-232 Transceivers. 2000.
[21]NS. DS90LV049 3V LVDS Dual Line Driver with Dual Line Receiver. 2003.
[22]杨全胜. 现代微机原理与接口技术. 第1版. 北京:电子工业出版社,2002. 234-255
[23]姚秀娟,胡行毅等. 软件无线电技术在航天地面综合电测中的应用. 中国空间科学学会空间探测专业委员会第十八次学术会议论文集,2005(10):172-175.
[24]张晓清,陈广旭. 通用卫星地面测试平台的设计与实现. 指挥学院学报,2000(11-6):77-81.
[25]曹志刚,钱亚生. 现代通信原理. 第1版. 北京:清华大学出版社,2003.
[26]毛继志,李建周. 基于FPGA和LVDS的AOS高速合路器/分路器研究. 计算机工程与设计,2005(30):137-139.
[27]潘松,黄继业. EDA技术实用教程. 第2版. 北京:科学出版社,2005.
[28]崔隆,张尔扬. CCSDS高级在轨系统复接业务性能的分析. 宇航学报,1997(18-3):101-104.