一种Zynq SoC片内硬件加速的二维傅里叶变换

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英文篇名：Two-dimensional Fourier Transform Based on Zynq SoC Hardware Acceleration 作者：陈龙 ; 曹力 英文作者：Chen Long;Cao Li;School of Civil Aviation,Nanjing University of Aeronautics and Astronautics; 关键词：Zynq ; 二维傅里叶变换 ; 硬件加速 英文关键词：Zynq;;two-dimensional fourier transform;;hardware acceleration 中文刊名：DPJY 英文刊名：Microcontrollers & Embedded Systems 机构：南京航空航天大学民航学院; 出版日期：2018-02-01 出版单位：单片机与嵌入式系统应用 年：2018 期：v.18;No.206 基金：国家级-低照度环境下基于红外图像的停机坪目标监视系统关键技术研究(U1633105) 语种：中文; 页：DPJY201802012 页数：5 CN：02 ISSN：11-4530/V 分类号：41-45

摘要

由于二维傅里叶变换计算量大,会导致在嵌入式应用过程中速度过慢。为此本文实验了一种基于Xilinx Zynq芯片的片内硬件加速实现方式,主要利用片内的可编程逻辑资源来完成变换过程中的大量计算,利用片内的处理器系统完成整个算法实现过程中的数据传输与调度。在获得FPGA提供的并行计算的速度优势同时,又保留了处理器系统软件开发的灵活性。借助于Xilinx提供的一维快速傅里叶变换IP核与Xillybus提供的总线方案,本文的实验通过软硬件结合的方式实现了二维傅里叶变换算法,与OpenCV计算比较,计算速度显著提高。
        As the two-dimensional Fourier transform requires a lot of calculation,so it often encounter the problem of slow speed in embedded applications.In the paper,a hardware acceleration method based on the Xilinx Zynq chip is designed,which mainly uses the onchip programmable logic resources to complete the large number of computation in the transformation process and uses the on-chip processor system processing system to complete the entire algorithm to achieve the process of data transmission and scheduling.This method not only obtains the speed advantage of parallel computing provided by FPGA,but also retains the flexible characteristics of processor system software development.In this paper,the two-dimensional Fourier transform algorithm is implemented by combining the hardware and software with the one-dimensional fast Fourier transform IP core provided by Xilinx and the bus scheme provided by Xillybus.Comparing with the OpenCV library function,the calculation speed is obviously improved.

引文

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