Micropower preamplifier for comparators of precision ADCs

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• 作者：D. L. Osipov
• 刊名：Russian Microelectronics
• 出版年：2015
• 出版时间：March 2015
• 年：2015
• 卷：44
• 期：2
• 页码：127-131
• 全文大小：566 KB
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  2. Scott, MD, Boser, BE, Pister, KSJ (2002) An ultralow power ADC for distributed sensor networks. Proc. 28th ESSCIRC. pp. 255-258
  3. Verma, N, Chandrakasan, AP (2006) A 25 W 100 kS/s 12b ADC for wireless micro-sensor applications. 2006 ISSCC Dig. Tech. Papers. pp. 829-838
  4. Wong, LSY, Hossain, S, Ta, A, Edvinsson, J, Rivas, DH, Naas, H (2004) A very low-power CMOS mixed-signal IC for implantable pacemaker applications. ISSCC Dig. Tech. Papers. pp. 318-319
  5. Butuzov, VA, Bocharov, YuI, Osipov, DL, Simakov, AB (2012) Precision BiCMOS sequential-approximation low-power consumption ADC. Vest. Nats. Issled. Yadern. Univ. MIFI 1: pp. 84-88
  6. Tomisawa, J, Nishikawa, K, Yamakawa, S (2008) Low-current consumption CMOS comparator using charge-storage amplifier for A/D converters. IEEE Int. Symp. on Circuits and Systems 2008 (ISCAS 2008). pp. 1942-1945 dx.doi.org/10.1109/ISCAS.2008.4541824" target="_blank" title="It opens in new window">CrossRef
  7. McCharles, RH, Hodges, DA (1978) Charge circuits for analog LSI. IEEE Trans. Circ. Syst. CAS-25: pp. 490-498 dx.doi.org/10.1109/TCS.1978.1084503" target="_blank" title="It opens in new window">CrossRef
  8. Ntyniemi, A M, Rahkonen, T, Kostamovaara, J (1999) An integrated digital CMOS time-to-digital converter with sub-gate-delay resolution. Analog Integrat. Circ. Signal Process.. pp. 61-70
  9. Chen, P, Liu, S-I, Wu, J (2000) A CMOS pulse-shrinking delay element for time interval measurement. IEEE Trans. Circ. Syst. II: Analog Digit. Signal Process. 47: pp. 954-958 dx.doi.org/10.1109/82.868466" target="_blank" title="It opens in new window">CrossRef
  
• 刊物类别：Engineering
• 刊物主题：Electronic and Computer Engineering
  Russian Library of Science
  
• 出版者：MAIK Nauka/Interperiodica distributed exclusively by Springer Science+Business Media LLC.
• ISSN：1608-3415

文摘

A preamplifier for comparators of precision low-power consumption analog-digital converters is presented. In order to lower the average consumption current of amplifier cascades, the capacitors, which fulfill the function of current sources during charging at the comparison stage, are used in them as the dynamic load. A correction circuit of the zero bias error for amplifiers of this type is developed. Modeling of the device using CMOS elements with a design rule of 0.35 μm from library XA035 of factory XFAB showed that the average current consumption at an operating frequency of 1 MHz is about 7 μA.